`include "VX_tex_define.vh" module VX_tex_format #( parameter CORE_ID = 0, parameter NUM_TEXELS = 4 //BILINEAR ) ( input wire [NUM_TEXELS-1:0][31:0] texel_data, input wire [`TEX_FORMAT_BITS-1:0] format, output wire [`NUM_COLOR_CHANNEL-1:0] color_enable, output wire [NUM_TEXELS-1:0][63:0] formatted_lerp_texel, output wire [31:0] formatted_pt_texel ); `UNUSED_PARAM (CORE_ID) reg [`NUM_COLOR_CHANNEL-1:0] color_enable_r; reg [NUM_TEXELS-1:0][63:0] formatted_texel_r; reg [31:0] formatted_pt_r; always @(*) begin // bilerp/trilerp input for (integer i = 0; i