Blaise Tine
|
ff7f65bd1f
|
opae build fixes
|
2020-07-21 05:44:13 -07:00 |
|
Blaise Tine
|
bdfacf709c
|
yosys synthesis refactoring
|
2020-07-10 18:56:41 -04:00 |
|
Blaise Tine
|
5d088d67c8
|
Gather FPGA perf stats
|
2020-07-01 09:30:12 -07:00 |
|
Blaise Tine
|
83a1695c73
|
OPAE CSR access
|
2020-06-30 18:14:06 -07:00 |
|
Blaise Tine
|
582a00d690
|
adding OPAE CSR support
|
2020-06-30 10:05:57 -07:00 |
|
Blaise Tine
|
2de61b5982
|
get device caps from CSRs
|
2020-06-30 00:08:23 -07:00 |
|
Blaise Tine
|
75d66dc335
|
fix sources.txt, run_ase.sh
|
2020-06-29 12:52:28 -07:00 |
|
Blaise Tine
|
f0046fed3c
|
added synthesis for Vortex single core
|
2020-06-29 08:39:57 -07:00 |
|
Blaise Tine
|
a70562d386
|
set target synthesis freq=200 MHz, set 4-cores as default config, MULT.latency=1, DIV.latency=18
|
2020-06-29 08:03:19 -07:00 |
|
Blaise Tine
|
d89931d564
|
minor fix
|
2020-06-28 18:56:22 -07:00 |
|
Blaise Tine
|
8302641510
|
fpga fixes
|
2020-06-27 14:03:20 -07:00 |
|
Blaise Tine
|
e6cc221a44
|
refactoring
|
2020-06-23 10:59:30 -07:00 |
|
Blaise Tine
|
5e718c2676
|
refactoring
|
2020-06-23 09:54:40 -07:00 |
|
Blaise Tine
|
0a01385a2c
|
few updates
|
2020-06-23 09:28:24 -07:00 |
|
Blaise Tine
|
f80e7c31de
|
Merge branch 'fpga_synthesis' of https://github.gatech.edu/casl/Vortex into fpga_synthesis
|
2020-06-20 15:21:42 -07:00 |
|
Blaise Tine
|
e6bbf671ee
|
minor update
|
2020-06-20 15:25:21 -07:00 |
|
Blaise Tine
|
d3440de403
|
round robin arbiter + auto buffered queue + fixed dcache arbiter
|
2020-06-20 17:56:04 -04:00 |
|
Blaise Tine
|
de0ff93fe5
|
minor cleanup
|
2020-06-19 09:25:24 -07:00 |
|
Blaise Tine
|
68d9fc9a75
|
driver basic test and demo test refactoring
|
2020-06-19 09:12:07 -07:00 |
|
Blaise Tine
|
e2e1b63e14
|
refactor synthesis scripts + fixed quartus ram read-after-write bypass
|
2020-06-16 11:45:47 -07:00 |
|
Blaise Tine
|
9850a1f890
|
minor fixes
|
2020-06-15 00:20:56 -07:00 |
|
Blaise Tine
|
75af29febb
|
scope refactoring
|
2020-06-13 11:47:28 -07:00 |
|
Blaise Tine
|
4fa540575c
|
fixed gpr_ram bug + io bus arbitration
|
2020-06-13 05:26:29 -07:00 |
|
Blaise Tine
|
d6b0ef2b3c
|
scope refactoring + snoop invalidate
|
2020-06-12 00:04:31 -07:00 |
|
Blaise Tine
|
19f263c772
|
scope fixes
|
2020-06-09 20:49:36 -07:00 |
|
Blaise Tine
|
457783322b
|
scope fixes
|
2020-06-09 07:03:52 -07:00 |
|
Blaise Tine
|
9575fe9a51
|
scope fixes
|
2020-06-08 06:54:47 -07:00 |
|
Blaise Tine
|
170c88f295
|
scope fixes
|
2020-06-08 04:25:28 -07:00 |
|
Blaise Tine
|
abc09eb1a3
|
Merge branch 'fpga_synthesis' of https://github.gatech.edu/casl/Vortex into fpga_synthesis
|
2020-06-05 22:59:26 -07:00 |
|
Blaise Tine
|
765462ceea
|
minor update
|
2020-06-05 22:59:07 -07:00 |
|
Blaise Tine
|
9ae38433fb
|
VX_pipeline refactoring + logic analyzer
|
2020-06-06 01:52:44 -04:00 |
|
Blaise Tine
|
203ebb3445
|
minor update
|
2020-06-04 15:53:04 -07:00 |
|
Blaise Tine
|
4e0e710182
|
OPAE rtl fixes
|
2020-06-04 15:44:03 -07:00 |
|
Blaise Tine
|
9eb0389717
|
minor update
|
2020-06-03 06:40:25 -04:00 |
|
Blaise Tine
|
626a4f6fc1
|
merge
|
2020-06-03 06:25:34 -04:00 |
|
Blaise Tine
|
106d707024
|
verilator suppor for opae (partial)
|
2020-06-03 06:22:49 -04:00 |
|
Blaise Tine
|
04fc34b848
|
minor update
|
2020-06-03 03:05:45 -07:00 |
|
Blaise Tine
|
9b186dcc6e
|
fixed L2 cache
|
2020-06-02 05:32:50 -07:00 |
|
Blaise Tine
|
e01c411b20
|
opae rtl fixes
|
2020-06-01 23:06:13 -07:00 |
|
Blaise Tine
|
16d5a8a09c
|
opae rtl fixes
|
2020-05-31 14:51:42 -07:00 |
|
Blaise Tine
|
33b273b204
|
Merge branch 'fpga_synthesis' of https://github.gatech.edu/casl/Vortex into fpga_synthesis
|
2020-05-28 18:34:25 -04:00 |
|
Blaise Tine
|
9e5885b820
|
adding dram writeenable support + scheduler bug fixes
|
2020-05-27 19:00:23 -04:00 |
|
Blaise Tine
|
61231cd2af
|
OPAE rtl fixes
|
2020-05-24 02:42:56 -07:00 |
|
Blaise Tine
|
9398c07afb
|
optimized avs_pending_reads in vortex_afu.sv
|
2020-05-23 19:54:37 -04:00 |
|
Blaise Tine
|
1512138a15
|
minor update
|
2020-05-22 19:14:07 -07:00 |
|
Blaise Tine
|
b02fc14da6
|
fill invalifator fix + refactoring
|
2020-05-21 20:38:55 -07:00 |
|
Blaise Tine
|
002a28e568
|
Merge branch 'fpga_synthesis' of https://github.gatech.edu/casl/Vortex into fpga_synthesis
|
2020-05-21 14:52:36 -04:00 |
|
Blaise Tine
|
3c8620e770
|
minor update
|
2020-05-21 14:51:56 -04:00 |
|
Blaise Tine
|
f14996b4ae
|
minor update
|
2020-05-20 23:54:27 -07:00 |
|
Blaise Tine
|
a8bf62a168
|
minor update
|
2020-05-20 21:05:29 -04:00 |
|