Lingjun Zhu
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b6558714ca
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Finished synthesis with all memory but no optimization
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2019-10-28 16:18:11 -04:00 |
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Lingjun Zhu
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0b30b3a35f
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Resolved most connection error, expect QA of rf2_256x19_wm0 in VX_cache_data
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2019-10-28 15:06:23 -04:00 |
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felsabbagh3
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a8d063e9ad
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Synthesis Cleanup 1
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2019-10-28 13:43:12 -04:00 |
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felsabbagh3
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88eab9e746
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Removed dependancy on
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2019-10-27 22:30:32 -04:00 |
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felsabbagh3
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715982cca7
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Modelsim Working + Simulating + dumping - Some bugs
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2019-10-27 03:36:02 -04:00 |
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felsabbagh3
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1181af1df2
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Modelsim basic sim
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2019-10-26 00:34:57 -04:00 |
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felsabbagh3
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820007ae80
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NUM_REQ
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2019-10-25 13:46:31 -04:00 |
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felsabbagh3
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c85c01e082
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Parametized cache
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2019-10-25 13:36:06 -04:00 |
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felsabbagh3
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89d0390965
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CACHE FINALLY WORKING
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2019-10-25 04:01:23 -04:00 |
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felsabbagh3
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01efe02e8b
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CACHE WORKING just needs lb/sb
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2019-10-25 03:03:09 -04:00 |
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felsabbagh3
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1e648c5819
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FIxed first circular issue
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2019-10-24 10:38:04 -04:00 |
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felsabbagh3
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de8de00f6e
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Finished cache not tested
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2019-10-23 19:07:26 -04:00 |
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felsabbagh3
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6340ffcc2a
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new cache states
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2019-10-23 15:07:14 -04:00 |
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felsabbagh3
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1645a04b1d
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Fixed SM + added def SYN
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2019-10-22 15:56:30 -04:00 |
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felsabbagh3
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9d8273afe4
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Finished Cache Integration
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2019-10-22 06:02:08 -04:00 |
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