wu-arch/vortex
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f8d54c6994298087d4a29a7a8d9e4f1dd5f965cf
Commit Graph
13 Commits
Author SHA1 Message Date
Blaise Tine 10505caae1 refactoring all arbiters with buffering for request count > 2, optimized the cache core response module in critical path when running as L2 2020-11-08 01:31:46 -08:00
Blaise Tine 49b86c4b2a SCOPE update 2020-09-05 10:52:59 -07:00
Blaise Tine 42e3b6c45d fixed lmp_mult parameters, ram init filepath 2020-09-04 07:51:46 -07:00
Blaise Tine c2dd0a8b39 modelsim fixes && pipeline optimization 2020-07-28 14:20:23 -07:00
Blaise Tine 1c9846d10b delete sources.txt 2020-07-28 03:20:20 -07:00
Blaise Tine ff7f65bd1f opae build fixes 2020-07-21 05:44:13 -07:00
Blaise Tine a70562d386 set target synthesis freq=200 MHz, set 4-cores as default config, MULT.latency=1, DIV.latency=18 2020-06-29 08:03:19 -07:00
Blaise Tine 4e0e710182 OPAE rtl fixes 2020-06-04 15:44:03 -07:00
Blaise Tine 16d5a8a09c opae rtl fixes 2020-05-31 14:51:42 -07:00
Blaise Tine 1512138a15 minor update 2020-05-22 19:14:07 -07:00
Blaise Tine b02fc14da6 fill invalifator fix + refactoring 2020-05-21 20:38:55 -07:00
Blaise Tine 11ace25f27 opae rtl fixes 2020-05-17 20:29:42 -07:00
Blaise Tine fc155e1223 project directories reorganization 2020-04-14 06:35:20 -04:00