14 Commits

Author	SHA1	Message	Date
Blaise Tine	c1e168fdbe	Vortex 2.0 changes: ... + Microarchitecture optimizations + 64-bit support + Xilinx FPGA support + LLVM-16 support + Refactoring and quality control fixes minor update minor update minor update minor update minor update minor update cleanup cleanup cache bindings and memory perf refactory minor update minor update hw unit tests fixes minor update minor update minor update minor update minor update minor udpate minor update minor update minor update minor update minor update minor update minor update minor updates minor updates minor update minor update minor update minor update minor update minor update minor updates minor updates minor updates minor updates minor update minor update	2023-11-10 02:47:05 -08:00
Santosh Srivatsan	b7e5a83ba3	Merged branch xlen-parameterization into staging	2022-02-05 13:47:42 -05:00
Blaise Tine	5fbace9fa0	fixed several bugs and refactor memory access	2022-02-04 17:50:19 -05:00
Blaise Tine	cf2a0a5f39	code refactoring	2022-02-04 00:07:24 -05:00
Santosh Srivatsan	836c777680	XLEN parameterization for simx	2022-02-03 15:19:31 -05:00
Blaise Tine	a06812f93f	minor updates	2022-02-01 22:51:33 -05:00
Santosh Srivatsan	ad92c09f5b	Changed all instances of DWord to XWord and DWordI to XWordI. Added XLEN parameterization to the simx Makefile	2022-01-22 13:47:44 -05:00
Blaise Tine	29df0da8b5	minor warning fixes	2022-01-10 20:33:37 -05:00
Santosh Srivatsan	4abfca4cb2	Replaced all instanced of DoubleWord to DWord and DoubleWordI to DWordI	2021-12-13 19:55:02 -05:00
Santosh Srivatsan	885bb58ca9	Merged RV64IMFD extensions to master branch	2021-12-11 17:06:29 -05:00
Blaise Tine	5825b7c15a	dram simulator fix	2021-12-07 22:44:06 -05:00
Blaise Tine	b741807f8c	using ramulator dram simulator	2021-12-06 01:22:45 -05:00
Blaise Tine	092ff42ab4	simx multicore fix	2021-12-01 00:12:16 -05:00
Blaise Tine	2a7a4df342	simx directory name fix	2021-11-30 07:17:58 -05:00