wu-arch/vortex
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
525 Commits 3 Branches 0 Tags
d593696a60e81ddafad1f3b31b5745b26c9d4595
Commit Graph

2 Commits

Author SHA1 Message Date
Lingjun Zhu
50d567d70c Removed unnessary Verilog files, linked memory tech files, having problem with memory instatiation 2019-10-28 14:49:55 -04:00
Lingjun Zhu
93531715bb Created a testbench and simulated the read/write of the register file 2019-10-18 22:55:34 -04:00