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wu-arch/vortex
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1,243 Commits 7 Branches 0 Tags
c9d38c2b800c355613b408b73693069c854a3d1e
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12 Commits
Author SHA1 Message Date
Blaise Tine f6f95e0c46 mutiple fixes: parallel printf, fixed cycle in cache, opencl refactored vecadd and sgemm, regen opencl kernels with hard-float, fixed vortex io bus interface, fixed dpi floats APi to support multicore mode, make vlsim multicore default, make rtlsim multi-core default, removed POCL binaries from repository, updated Makefiles to use external POCL 2020-09-19 14:45:42 -04:00
Blaise Tine 37a19873d7 fixed POCL device cleanup 2020-09-04 10:45:25 -04:00
Blaise Tine c5a64a0eed interfaces refactoring 2020-07-02 19:31:55 -07:00
Blaise Tine 5d088d67c8 Gather FPGA perf stats 2020-07-01 09:30:12 -07:00
Blaise Tine b56fb31a6a fpga_synthesis merge 2020-06-23 12:41:26 -07:00
Blaise Tine fc155e1223 project directories reorganization 2020-04-14 06:35:20 -04:00
Blaise Tine 717a75ade8 fixed opencl benchmarks 2020-03-09 09:55:16 -04:00
Blaise Tine 1a812e4524 update 2019-11-23 00:00:11 -05:00
Blaise Tine f01936dc92 update 2019-11-22 23:10:51 -05:00
Blaise Tine 30e49b3fc2 benchmark fixes 2019-11-22 22:34:43 -05:00
Blaise Tine e284f4bc27 vecadd 2019-11-22 15:14:59 -05:00
Blaise Tine f3ea5820c1 vecadd 2019-11-22 15:14:59 -05:00
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