wu-arch/vortex
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c2a7b02d2789bbd542e8f60c18b00a5bfa147909
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3 Commits

Author SHA1 Message Date
Blaise Tine
3f5fd6d394 using shiftreg-based skid buffers 2021-02-28 02:20:09 -08:00
Blaise Tine
8775f63ec4 lkg build rollout with 16cores optimization on arria10 2021-01-24 16:49:22 -08:00
Blaise Tine
4bbd7bf408 performance refactoring - rebalanced stream buffers accross the device to enforce output buffering rule at compoments boudaries, finally resolved block ram R/W collusion discrepencies, 2020-12-19 02:45:06 -08:00