Santosh Raghav Srivatsan
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bde789b320
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Added support for RV32D and RV64D instructions
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2021-12-10 16:30:24 -05:00 |
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Santosh Raghav Srivatsan
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e6eda67d0c
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Modified RV32F instructions to support 64-bit register file and added RV64F ISA extension
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2021-12-06 18:55:13 -05:00 |
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Santosh Raghav Srivatsan
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3784da0d2f
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riscv-tests work on simx
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2021-12-01 19:41:16 -05:00 |
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Santosh Raghav Srivatsan
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f0dc04ad04
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Added tests to commit. 64 bit simx still not working
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2021-12-01 02:44:14 -05:00 |
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Santosh Raghav Srivatsan
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d1892bd6ec
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Added support for a few RV64I instructions
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2021-11-11 13:35:14 -05:00 |
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Blaise Tine
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54bddeee9c
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simulation framework refactoring
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2021-10-09 10:20:42 -04:00 |
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