Blaise Tine
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bb1ceffadd
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rebase master update
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2021-07-30 21:03:14 -07:00 |
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Blaise Tine
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5c58f7eec6
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minor update
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2021-07-16 12:57:50 -07:00 |
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Blaise Tine
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93fee18d59
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minor update
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2021-07-01 02:59:44 -07:00 |
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Blaise Tine
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b3e54e66f8
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fixed compiler warnings
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2021-05-23 10:54:06 -07:00 |
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Blaise Tine
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269c06f7ea
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minor update
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2021-04-29 23:58:45 -07:00 |
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Blaise Tine
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95f057bc2e
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fpga build refactoring
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2021-04-29 06:17:28 -07:00 |
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Blaise Tine
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8410c49f53
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code refactoring: DRAM => MEM renaming
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2021-04-26 00:58:48 -07:00 |
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Blaise Tine
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4cb98a25a7
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enabling 128-bit dram bus
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2021-04-24 00:31:27 -04:00 |
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Blaise Tine
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700f9eea19
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moving MUL unit into ALU unit
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2021-02-23 13:49:02 -08:00 |
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Blaise Tine
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5419859281
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fcvt fix
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2021-01-25 02:22:00 -08:00 |
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Blaise Tine
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ac2242b51f
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minor update
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2021-01-07 00:18:10 -08:00 |
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Blaise Tine
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146c285aa0
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minor update
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2021-01-06 19:59:04 -08:00 |
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Blaise Tine
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2b8435471a
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speeding up simulation using dedicated full dpi-based FPU core
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2021-01-06 18:44:06 -08:00 |
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Blaise Tine
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b85391389b
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rename MSRQ to MSHR
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2020-11-28 17:32:00 -05:00 |
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Blaise Tine
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00d7473268
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build warnings clean
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2020-11-28 14:59:13 -05:00 |
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Blaise Tine
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461be0880d
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fixed FPU-CSR data dependence
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2020-11-25 09:05:38 -08:00 |
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Blaise Tine
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1795980a52
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L2 and L1 using different block size support, RTLsim fixes, dram_rsp_ready optimization
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2020-11-21 09:47:56 -08:00 |
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Blaise Tine
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e946d976e7
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constant integration updates
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2020-11-15 08:44:57 -08:00 |
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Blaise Tine
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5d58bf3d11
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fixed l3cache hang using memory arbiter in afu
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2020-11-15 06:36:32 -08:00 |
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Blaise Tine
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5be1d85648
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cache refactoring (fixed redundant fill requests, merged fill and writeback queues), optimized priority encoder, fixed crs cycles count
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2020-11-02 01:50:12 -08:00 |
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Blaise Tine
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43ae82e788
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vlsim fix, verilator fst trace, use ram optimization
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2020-10-25 16:40:50 -07:00 |
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Blaise Tine
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4e1007e5b2
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scope refactoring
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2020-10-03 18:53:21 -04:00 |
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Blaise Tine
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f6f95e0c46
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mutiple fixes: parallel printf, fixed cycle in cache, opencl refactored vecadd and sgemm, regen opencl kernels with hard-float, fixed vortex io bus interface, fixed dpi floats APi to support multicore mode, make vlsim multicore default, make rtlsim multi-core default, removed POCL binaries from repository, updated Makefiles to use external POCL
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2020-09-19 14:45:42 -04:00 |
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Blaise Tine
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df711986bc
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FPU DPI fallback
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2020-08-31 09:19:55 -04:00 |
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Blaise Tine
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cd29362d10
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fixed FPU handshake, optimized writeback's critical path
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2020-08-07 10:11:54 -07:00 |
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Blaise Tine
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b8cd3b0b28
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gpr pipeline optimization
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2020-08-01 12:38:30 -04:00 |
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Blaise Tine
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31ee824862
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merged fpu_port branch
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2020-07-31 17:13:22 -04:00 |
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Blaise Tine
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4bdab8903e
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merge
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2020-07-31 16:49:59 -04:00 |
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Blaise Tine
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c9755a0c48
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lkg build with pipeline + FPU fixes
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2020-07-31 09:29:44 -04:00 |
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Blaise Tine
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c2dd0a8b39
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modelsim fixes && pipeline optimization
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2020-07-28 14:20:23 -07:00 |
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MalikBurton
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7fc7bc0cab
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Runtime tests and riscv tests are runnable
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2020-07-28 16:04:27 -04:00 |
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Blaise Tine
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8976100025
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floating point support fixes
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2020-07-28 04:19:46 -04:00 |
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Blaise Tine
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7c86b68977
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pipeline refactoring: centralized issue buffer
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2020-07-26 11:21:08 -04:00 |
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Blaise Tine
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1f63f9da25
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new fpu implementation
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2020-07-24 00:00:37 -04:00 |
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Blaise Tine
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dc7efbcfb4
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pipeline refactoring
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2020-07-21 05:22:47 -04:00 |
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Blaise Tine
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25f66e6490
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pipeline refactoring
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2020-07-19 05:03:47 -04:00 |
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Blaise Tine
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bdfacf709c
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yosys synthesis refactoring
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2020-07-10 18:56:41 -04:00 |
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Blaise Tine
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a70562d386
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set target synthesis freq=200 MHz, set 4-cores as default config, MULT.latency=1, DIV.latency=18
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2020-06-29 08:03:19 -07:00 |
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Blaise Tine
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d33916f1e0
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minor update
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2020-06-29 00:38:59 -07:00 |
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Blaise Tine
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8a306de02d
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runtime static library
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2020-06-27 14:13:13 -04:00 |
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Blaise Tine
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b7d7e69f47
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fixed assertion in lsu_unit
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2020-06-26 00:27:55 -04:00 |
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Blaise Tine
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e6cc221a44
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refactoring
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2020-06-23 10:59:30 -07:00 |
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Blaise Tine
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d3440de403
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round robin arbiter + auto buffered queue + fixed dcache arbiter
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2020-06-20 17:56:04 -04:00 |
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Blaise Tine
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68d9fc9a75
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driver basic test and demo test refactoring
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2020-06-19 09:12:07 -07:00 |
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Blaise Tine
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d6b0ef2b3c
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scope refactoring + snoop invalidate
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2020-06-12 00:04:31 -07:00 |
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Blaise Tine
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106d707024
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verilator suppor for opae (partial)
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2020-06-03 06:22:49 -04:00 |
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