5 Commits

Author	SHA1	Message	Date
Blaise Tine	c2dd0a8b39	modelsim fixes && pipeline optimization	2020-07-28 14:20:23 -07:00
Blaise Tine	bdfacf709c	yosys synthesis refactoring	2020-07-10 18:56:41 -04:00
Blaise Tine	75d66dc335	fix sources.txt, run_ase.sh	2020-06-29 12:52:28 -07:00
felsabbagh3	21566cdcd7	Fixed Single Core with Optimizations	2020-06-28 19:38:36 -07:00
felsabbagh3	ffb760cf73	Optimized cache writeback path by 1) VX_fair_arbiter and 2) Added a wb register between LSU and WB arbiter	2020-06-28 14:27:47 -07:00