5 Commits

Author	SHA1	Message	Date
Blaise Tine	d808aa2735	perf counters generic size	2021-04-25 21:15:24 -07:00
Blaise Tine	e64996946d	using 44-bit perf counters - aligned with DSP counters width	2021-02-28 02:05:47 -08:00
Blaise Tine	700f9eea19	moving MUL unit into ALU unit	2021-02-23 13:49:02 -08:00
Blaise Tine	d956e268b9	adding new performance counters (banks utilization and DRAM bus utilization)	2020-12-22 12:33:45 -08:00
Blaise Tine	d5438fd591	merging perf counters	2020-12-08 21:02:39 -08:00