Blaise Tine
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9f34b2944c
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code refactoring for Vivado, sv2v, and yosys compatibility
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2021-09-27 08:55:10 -04:00 |
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Blaise Tine
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18172fa611
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AXI memory bus support
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2021-09-10 01:36:01 -07:00 |
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Blaise Tine
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a60bfc5e01
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extending tracing feature for advanced debugging
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2021-08-15 05:10:46 -07:00 |
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Blaise Tine
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d684a2e632
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application exit error handing
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2021-06-29 02:04:07 -04:00 |
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Blaise Tine
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2372067817
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minor update
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2021-06-22 09:30:36 -07:00 |
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Blaise Tine
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3cc1190cd7
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CSRs I/O refactoring
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2021-06-11 03:08:07 -07:00 |
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Blaise Tine
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a46d6cb606
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ebreak workaround for RISC-V tests
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2021-06-10 19:55:33 -07:00 |
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Blaise Tine
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3071fb7a29
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adding support for non-cacheable memory addressing
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2021-06-06 13:35:55 -07:00 |
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Blaise Tine
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8543e3a8bf
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code refactoring
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2021-04-26 02:34:21 -07:00 |
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Blaise Tine
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8410c49f53
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code refactoring: DRAM => MEM renaming
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2021-04-26 00:58:48 -07:00 |
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Blaise Tine
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4bc3b537bd
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fixed reset fan-out
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2021-01-03 20:06:36 -08:00 |
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Blaise Tine
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4815ab099c
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using single-port block ram for cache tags, restoring core reset signal
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2021-01-02 19:53:41 -08:00 |
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Blaise Tine
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703a861fe9
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added support for write-through cache, removed cache snooping support
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2020-12-23 23:51:02 -08:00 |
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Blaise Tine
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b7a724410b
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update DRAM simulation - reduce the latency of duplicate requests (simulate DRAM cache)
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2020-12-03 07:30:19 -08:00 |
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Blaise Tine
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457f831435
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fixed scoreboard stall
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2020-11-28 03:14:20 -05:00 |
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Blaise Tine
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461be0880d
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fixed FPU-CSR data dependence
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2020-11-25 09:05:38 -08:00 |
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Blaise Tine
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664ce28426
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minor update
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2020-11-23 12:21:39 -08:00 |
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Blaise Tine
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2d4fef6dd6
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fixed fp_noncomp bug, ci toolchain script update, increased DRAM latency to 100 cycles
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2020-11-23 11:59:40 -08:00 |
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Blaise Tine
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1795980a52
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L2 and L1 using different block size support, RTLsim fixes, dram_rsp_ready optimization
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2020-11-21 09:47:56 -08:00 |
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Blaise Tine
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5be1d85648
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cache refactoring (fixed redundant fill requests, merged fill and writeback queues), optimized priority encoder, fixed crs cycles count
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2020-11-02 01:50:12 -08:00 |
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Blaise Tine
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43ae82e788
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vlsim fix, verilator fst trace, use ram optimization
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2020-10-25 16:40:50 -07:00 |
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Blaise Tine
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f6f95e0c46
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mutiple fixes: parallel printf, fixed cycle in cache, opencl refactored vecadd and sgemm, regen opencl kernels with hard-float, fixed vortex io bus interface, fixed dpi floats APi to support multicore mode, make vlsim multicore default, make rtlsim multi-core default, removed POCL binaries from repository, updated Makefiles to use external POCL
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2020-09-19 14:45:42 -04:00 |
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Blaise Tine
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0fab1ddd92
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adding support for verilator-driven AFU driver: vlsim
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2020-09-08 13:05:26 -04:00 |
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Blaise Tine
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112d8ab815
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adding CSR support to rtlsim driver
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2020-09-04 06:51:31 -04:00 |
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Blaise Tine
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c9755a0c48
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lkg build with pipeline + FPU fixes
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2020-07-31 09:29:44 -04:00 |
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Blaise Tine
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f01afcc5cd
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floating point support fixes + riscv-tests update
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2020-07-28 02:19:11 -04:00 |
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Blaise Tine
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e0a9089647
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floating point support fixes
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2020-07-27 16:01:56 -04:00 |
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Blaise Tine
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ff12393998
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floating point support fixes
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2020-07-27 04:53:13 -04:00 |
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Blaise Tine
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fb44de8017
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fixed simulator leak
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2020-07-21 06:17:41 -07:00 |
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Blaise Tine
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25f66e6490
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pipeline refactoring
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2020-07-19 05:03:47 -04:00 |
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Blaise Tine
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5e718c2676
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refactoring
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2020-06-23 09:54:40 -07:00 |
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Blaise Tine
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68d9fc9a75
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driver basic test and demo test refactoring
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2020-06-19 09:12:07 -07:00 |
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Blaise Tine
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171d46b501
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fix l2 cache issues
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2020-06-04 18:34:14 -04:00 |
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Blaise Tine
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106d707024
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verilator suppor for opae (partial)
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2020-06-03 06:22:49 -04:00 |
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Blaise Tine
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9e5885b820
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adding dram writeenable support + scheduler bug fixes
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2020-05-27 19:00:23 -04:00 |
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Blaise Tine
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fcf3800d5d
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snooping response handling fix
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2020-05-12 13:35:18 -04:00 |
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Blaise Tine
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c49f01b769
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snooping response handling
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2020-05-11 22:55:44 -04:00 |
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Blaise Tine
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cc84e0691c
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multicore fix
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2020-05-10 08:30:04 -04:00 |
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Blaise Tine
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59cc0d5be9
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rtl multicore fix
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2020-05-06 13:33:16 -04:00 |
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Blaise Tine
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7e748e4e38
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rtl refactoring
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2020-05-05 16:28:14 -04:00 |
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Blaise Tine
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2ab90e9436
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rtl refactoring
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2020-05-05 13:31:50 -04:00 |
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Blaise Tine
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69f607b73e
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rtl refactoring
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2020-05-03 17:10:02 -04:00 |
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Blaise Tine
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a1dc90b951
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rtl cache refactory
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2020-04-30 17:12:18 -04:00 |
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Blaise Tine
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07135263f5
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RTL code refactoring
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2020-04-20 06:47:24 -04:00 |
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Blaise Tine
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9b476f1e17
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RTL code refactoring
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2020-04-19 03:38:00 -04:00 |
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Blaise Tine
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31f906f9fd
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fixed all build warnings
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2020-04-16 10:22:46 -04:00 |
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Blaise Tine
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12dc4d6874
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refactoring fixes
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2020-04-14 19:39:59 -04:00 |
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