Blaise Tine
|
9f34b2944c
|
code refactoring for Vivado, sv2v, and yosys compatibility
|
2021-09-27 08:55:10 -04:00 |
|
Blaise Tine
|
aeeb3ca616
|
ALU unit critical path optimization
|
2021-09-07 23:54:10 -07:00 |
|
Blaise Tine
|
a801a16062
|
instruction decode refactoring fixing naming collision
|
2021-08-29 20:07:34 -07:00 |
|
Blaise Tine
|
e4d9fd8a00
|
thread mask redesign
|
2021-08-05 17:32:58 -07:00 |
|
Blaise Tine
|
7b8fe11e6a
|
unused variables refactoring
|
2021-08-05 01:46:26 -07:00 |
|
Blaise Tine
|
d3b788784a
|
memory interface refactoring
|
2021-07-20 21:06:55 -07:00 |
|
Blaise Tine
|
7d01be367c
|
reset network refactoring
|
2021-07-15 11:34:55 -07:00 |
|
Blaise Tine
|
360f8e4e37
|
reset network optimization
|
2021-07-01 18:05:59 -07:00 |
|
Blaise Tine
|
6ae2f5199d
|
decode optimization
|
2021-06-28 05:06:30 -07:00 |
|
Blaise Tine
|
1ea738ed26
|
lkg build
|
2021-06-25 16:28:10 -07:00 |
|
Blaise Tine
|
3cc1190cd7
|
CSRs I/O refactoring
|
2021-06-11 03:08:07 -07:00 |
|
Blaise Tine
|
a46d6cb606
|
ebreak workaround for RISC-V tests
|
2021-06-10 19:55:33 -07:00 |
|
Blaise Tine
|
cbca7e12c6
|
removing ebreak signals from public interface
|
2021-06-10 12:57:44 -07:00 |
|
Blaise Tine
|
700f9eea19
|
moving MUL unit into ALU unit
|
2021-02-23 13:49:02 -08:00 |
|
Blaise Tine
|
ab63ac9e5d
|
cache request interfaces update
|
2021-02-10 20:55:04 -08:00 |
|
Blaise Tine
|
d5438fd591
|
merging perf counters
|
2020-12-08 21:02:39 -08:00 |
|
Xandy Liu
|
1595ff08e2
|
PERF pipeline stalls and cache
|
2020-12-08 01:14:41 -05:00 |
|
Blaise Tine
|
13a5370254
|
register file refactoring
|
2020-12-05 01:40:50 -08:00 |
|
Blaise Tine
|
fb60d0af87
|
decoupled load/store commits
|
2020-12-03 15:08:48 -08:00 |
|
Blaise Tine
|
461be0880d
|
fixed FPU-CSR data dependence
|
2020-11-25 09:05:38 -08:00 |
|
Blaise Tine
|
b14007f930
|
pipeline optimization: fixed GPR fanout delay to execute units
|
2020-11-07 02:01:21 -08:00 |
|
Blaise Tine
|
5be1d85648
|
cache refactoring (fixed redundant fill requests, merged fill and writeback queues), optimized priority encoder, fixed crs cycles count
|
2020-11-02 01:50:12 -08:00 |
|
Blaise Tine
|
4bfc4ee78f
|
scope fixes
|
2020-10-13 08:44:55 -07:00 |
|
Blaise Tine
|
32da50816f
|
scope refactoring: adding modules definitions to VCD trace
|
2020-10-12 23:26:02 -04:00 |
|
Blaise Tine
|
49b86c4b2a
|
SCOPE update
|
2020-09-05 10:52:59 -07:00 |
|
Blaise Tine
|
c63217f67d
|
fixed SCOPE interface
|
2020-09-01 05:20:13 -07:00 |
|
Blaise Tine
|
57971f6c76
|
decode op_mod optimization
|
2020-08-24 02:55:14 -07:00 |
|
Blaise Tine
|
0b355f228e
|
ibuffer addition
|
2020-08-22 00:22:04 -07:00 |
|
Blaise Tine
|
6c12391338
|
pipeline refactoring - fmax >= 222 mhz
|
2020-08-14 21:50:14 -07:00 |
|
Blaise Tine
|
65415d2bbc
|
getting dogfood tests passing on Verilator!
|
2020-08-09 18:13:12 -04:00 |
|
Blaise Tine
|
b8cd3b0b28
|
gpr pipeline optimization
|
2020-08-01 12:38:30 -04:00 |
|
Blaise Tine
|
836a735555
|
minor updates
|
2020-07-31 13:39:52 -07:00 |
|
Blaise Tine
|
c2dd0a8b39
|
modelsim fixes && pipeline optimization
|
2020-07-28 14:20:23 -07:00 |
|
Blaise Tine
|
8976100025
|
floating point support fixes
|
2020-07-28 04:19:46 -04:00 |
|
Blaise Tine
|
e0a9089647
|
floating point support fixes
|
2020-07-27 16:01:56 -04:00 |
|
Blaise Tine
|
7c86b68977
|
pipeline refactoring: centralized issue buffer
|
2020-07-26 11:21:08 -04:00 |
|
Blaise Tine
|
1f63f9da25
|
new fpu implementation
|
2020-07-24 00:00:37 -04:00 |
|
Blaise Tine
|
75e3c31b56
|
fpu implementation (part1)
|
2020-07-23 03:18:09 -07:00 |
|
Blaise Tine
|
dc7efbcfb4
|
pipeline refactoring
|
2020-07-21 05:22:47 -04:00 |
|
Blaise Tine
|
e2100e9e87
|
pipeline refactoring
|
2020-07-20 09:38:54 -04:00 |
|
Blaise Tine
|
577a5791dc
|
pipeline refactoring
|
2020-07-20 08:04:04 -04:00 |
|
Blaise Tine
|
25f66e6490
|
pipeline refactoring
|
2020-07-19 05:03:47 -04:00 |
|