4 Commits

Author	SHA1	Message	Date
Richard Yan	85213d2876	synthesizable design	2024-04-17 18:05:51 -07:00
Richard Yan	8de5470da4	round robin warp scheduling	2024-04-16 23:03:00 -07:00
Blaise Tine	d47cccc157	Vortex 2.0 changes: ... + Microarchitecture optimizations + 64-bit support + Xilinx FPGA support + LLVM-16 support + Refactoring and quality control fixes	2023-10-19 20:51:22 -07:00
Blaise Tine	04249c3ee9	code refactoring for Vivado compatibility	2021-09-29 04:48:53 -04:00