Blaise Tine
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7529f72c5d
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fixed OPAE crash, added custom bram module to controll rw collision, dogfood testcase argurment, optimzed buffered fifo, quartus build optimization flags
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2020-10-20 05:32:55 -07:00 |
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Blaise Tine
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301cc45740
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scope fixes
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2020-10-14 09:19:26 -07:00 |
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Blaise Tine
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58b8e82908
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scope fixes ...
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2020-10-13 17:09:22 -04:00 |
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Blaise Tine
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4bfc4ee78f
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scope fixes
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2020-10-13 08:44:55 -07:00 |
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Blaise Tine
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32da50816f
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scope refactoring: adding modules definitions to VCD trace
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2020-10-12 23:26:02 -04:00 |
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Blaise Tine
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309dd48fc6
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scope bug fixes
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2020-10-06 03:59:27 -04:00 |
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Blaise Tine
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4e1007e5b2
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scope refactoring
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2020-10-03 18:53:21 -04:00 |
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Blaise Tine
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91f348c61a
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adding prebuilt CI script
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2020-09-19 16:08:28 -04:00 |
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Blaise Tine
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f6f95e0c46
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mutiple fixes: parallel printf, fixed cycle in cache, opencl refactored vecadd and sgemm, regen opencl kernels with hard-float, fixed vortex io bus interface, fixed dpi floats APi to support multicore mode, make vlsim multicore default, make rtlsim multi-core default, removed POCL binaries from repository, updated Makefiles to use external POCL
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2020-09-19 14:45:42 -04:00 |
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Blaise Tine
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80f929eb61
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fixed build warnings; sgemm Makefile
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2020-09-10 13:39:34 -04:00 |
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Blaise Tine
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fba2fa03c7
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fixed new AFU Driver bugs - now functional
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2020-09-09 17:05:48 -04:00 |
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Blaise Tine
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bf7b0cf340
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Merge branch 'master' of https://github.gatech.edu/casl/Vortex
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2020-09-08 13:05:47 -04:00 |
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Blaise Tine
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0fab1ddd92
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adding support for verilator-driven AFU driver: vlsim
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2020-09-08 13:05:26 -04:00 |
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Blaise Tine
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36ec603d17
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fpga fixes: warp scheduler, fnmadd, fdiv, fsqrt
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2020-09-08 07:05:26 -07:00 |
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Blaise Tine
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75c98c6ea3
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fmadd fix
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2020-09-06 01:20:22 -07:00 |
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Blaise Tine
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49b86c4b2a
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SCOPE update
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2020-09-05 10:52:59 -07:00 |
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Blaise Tine
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42e3b6c45d
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fixed lmp_mult parameters, ram init filepath
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2020-09-04 07:51:46 -07:00 |
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Blaise Tine
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b82f5a9011
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fix ci bui;d
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2020-09-01 10:45:44 -07:00 |
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Blaise Tine
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c63217f67d
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fixed SCOPE interface
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2020-09-01 05:20:13 -07:00 |
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Blaise Tine
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0a45a8beb3
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minor update
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2020-09-01 00:56:10 -07:00 |
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Blaise Tine
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ee81e81818
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adding using serial divider to save area cost
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2020-08-25 02:29:27 -07:00 |
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Blaise Tine
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f292e5003d
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quartus build fixes
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2020-08-23 22:04:46 -07:00 |
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Blaise Tine
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96f5432592
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minor update
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2020-08-22 13:56:07 -07:00 |
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Blaise Tine
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0b355f228e
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ibuffer addition
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2020-08-22 00:22:04 -07:00 |
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Blaise Tine
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6c12391338
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pipeline refactoring - fmax >= 222 mhz
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2020-08-14 21:50:14 -07:00 |
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Blaise Tine
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65415d2bbc
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getting dogfood tests passing on Verilator!
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2020-08-09 18:13:12 -04:00 |
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Blaise Tine
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ffd9515881
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added altera fpu modules
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2020-08-05 15:53:59 -07:00 |
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Blaise Tine
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d8bdaa2b4e
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minor update
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2020-08-01 14:38:31 -07:00 |
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Blaise Tine
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b8cd3b0b28
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gpr pipeline optimization
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2020-08-01 12:38:30 -04:00 |
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Blaise Tine
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836a735555
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minor updates
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2020-07-31 13:39:52 -07:00 |
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Blaise Tine
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c2dd0a8b39
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modelsim fixes && pipeline optimization
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2020-07-28 14:20:23 -07:00 |
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Blaise Tine
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1c9846d10b
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delete sources.txt
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2020-07-28 03:20:20 -07:00 |
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Blaise Tine
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7c86b68977
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pipeline refactoring: centralized issue buffer
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2020-07-26 11:21:08 -04:00 |
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Blaise Tine
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ff7f65bd1f
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opae build fixes
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2020-07-21 05:44:13 -07:00 |
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Blaise Tine
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bdfacf709c
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yosys synthesis refactoring
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2020-07-10 18:56:41 -04:00 |
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Blaise Tine
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5d088d67c8
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Gather FPGA perf stats
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2020-07-01 09:30:12 -07:00 |
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Blaise Tine
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83a1695c73
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OPAE CSR access
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2020-06-30 18:14:06 -07:00 |
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Blaise Tine
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582a00d690
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adding OPAE CSR support
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2020-06-30 10:05:57 -07:00 |
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Blaise Tine
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2de61b5982
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get device caps from CSRs
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2020-06-30 00:08:23 -07:00 |
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Blaise Tine
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75d66dc335
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fix sources.txt, run_ase.sh
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2020-06-29 12:52:28 -07:00 |
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Blaise Tine
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f0046fed3c
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added synthesis for Vortex single core
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2020-06-29 08:39:57 -07:00 |
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Blaise Tine
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a70562d386
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set target synthesis freq=200 MHz, set 4-cores as default config, MULT.latency=1, DIV.latency=18
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2020-06-29 08:03:19 -07:00 |
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Blaise Tine
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d89931d564
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minor fix
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2020-06-28 18:56:22 -07:00 |
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Blaise Tine
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8302641510
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fpga fixes
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2020-06-27 14:03:20 -07:00 |
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Blaise Tine
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e6cc221a44
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refactoring
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2020-06-23 10:59:30 -07:00 |
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Blaise Tine
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5e718c2676
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refactoring
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2020-06-23 09:54:40 -07:00 |
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Blaise Tine
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0a01385a2c
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few updates
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2020-06-23 09:28:24 -07:00 |
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Blaise Tine
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f80e7c31de
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Merge branch 'fpga_synthesis' of https://github.gatech.edu/casl/Vortex into fpga_synthesis
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2020-06-20 15:21:42 -07:00 |
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Blaise Tine
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e6bbf671ee
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minor update
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2020-06-20 15:25:21 -07:00 |
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Blaise Tine
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d3440de403
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round robin arbiter + auto buffered queue + fixed dcache arbiter
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2020-06-20 17:56:04 -04:00 |
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