Blaise Tine
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664ce28426
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minor update
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2020-11-23 12:21:39 -08:00 |
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Blaise Tine
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2d4fef6dd6
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fixed fp_noncomp bug, ci toolchain script update, increased DRAM latency to 100 cycles
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2020-11-23 11:59:40 -08:00 |
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Blaise Tine
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1795980a52
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L2 and L1 using different block size support, RTLsim fixes, dram_rsp_ready optimization
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2020-11-21 09:47:56 -08:00 |
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Blaise Tine
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725322807e
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fixed DRAM response backpressure inside Cache
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2020-11-10 05:24:57 -08:00 |
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Blaise Tine
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5be1d85648
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cache refactoring (fixed redundant fill requests, merged fill and writeback queues), optimized priority encoder, fixed crs cycles count
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2020-11-02 01:50:12 -08:00 |
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Blaise Tine
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48897d9778
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minor update
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2020-10-25 18:29:25 -07:00 |
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Blaise Tine
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43ae82e788
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vlsim fix, verilator fst trace, use ram optimization
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2020-10-25 16:40:50 -07:00 |
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Blaise Tine
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4e1007e5b2
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scope refactoring
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2020-10-03 18:53:21 -04:00 |
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Blaise Tine
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38303cdc2f
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vlsim: host_buffer optimization
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2020-09-09 17:53:31 -04:00 |
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Blaise Tine
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fba2fa03c7
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fixed new AFU Driver bugs - now functional
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2020-09-09 17:05:48 -04:00 |
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Blaise Tine
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0fab1ddd92
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adding support for verilator-driven AFU driver: vlsim
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2020-09-08 13:05:26 -04:00 |
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