Blaise Tine
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3d7baf1640
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block ram read enable fix
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2021-09-14 01:45:01 -07:00 |
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Blaise Tine
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ca46b0a0be
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OUTPUT_REG => OUT_REG renaming
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2021-09-09 03:05:38 -07:00 |
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Blaise Tine
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d91d56d126
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block ram refactoring (multi-porting supporting and simulation support)
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2021-08-26 08:19:44 -07:00 |
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Blaise Tine
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646371f9e9
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bram block optimization
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2021-08-13 19:31:55 -07:00 |
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Blaise Tine
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7961cf7474
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Disabling tracing on library
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2021-08-12 01:55:52 -07:00 |
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Blaise Tine
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7b8fe11e6a
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unused variables refactoring
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2021-08-05 01:46:26 -07:00 |
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Blaise Tine
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ea1e0f201e
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OUTPUT_REG refactoring
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2021-07-23 06:58:37 -07:00 |
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Blaise Tine
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ebee332e9d
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minor update
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2021-02-27 02:31:05 -08:00 |
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Blaise Tine
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700f9eea19
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moving MUL unit into ALU unit
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2021-02-23 13:49:02 -08:00 |
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Blaise Tine
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8775f63ec4
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lkg build rollout with 16cores optimization on arria10
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2021-01-24 16:49:22 -08:00 |
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Blaise Tine
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a046bd7a73
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cache pipeline optimization
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2021-01-17 17:19:52 -08:00 |
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Blaise Tine
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ed216ab39d
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minor updates
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2021-01-17 13:58:43 -08:00 |
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Blaise Tine
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06945533cf
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fixed l2/l3 caches related bugs
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2021-01-09 16:32:55 -08:00 |
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Blaise Tine
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39bff921be
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cache bug fixes
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2021-01-05 05:04:49 -08:00 |
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Blaise Tine
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d44144f72f
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FPU float<->int conversion optimization
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2020-12-29 15:37:45 -08:00 |
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