12 Commits

Include renames

Author	SHA1	Message	Date
felsabbagh3	313a8e3b4b	All cache bugs fixed - Handshaking	2020-03-28 21:43:02 -07:00
felsabbagh3	5dc9493c61	ALL tests passing - handshake	2020-03-27 21:34:49 -07:00
felsabbagh3	614797e52f	Migrating fpga_synthesis_temp to main	2020-03-27 13:15:23 -07:00
felsabbagh3	4e6de0dc38	Fixed most of the cache issues, mat_add left	2020-03-22 15:59:45 -07:00
felsabbagh3	d146070275	Fix for Single-Threaded	2020-03-22 14:44:46 -07:00
felsabbagh3	70651f0340	Added a pipeline stage + fixed SM param errors	2019-11-13 12:25:28 -05:00
felsabbagh3	ea7bd485ca	Icache/Dcache finally done + configurability tested:	2019-11-09 00:03:15 -05:00
felsabbagh3	8b81989bfd	Before way logic change	2019-11-08 18:16:40 -05:00
felsabbagh3	20283e6d5d	Verified simple mat_add matrix on RTL	2019-11-07 18:12:15 -05:00
felsabbagh3	5d5ad9c4ec	FIXED BUGS	2019-11-07 13:54:46 -05:00
felsabbagh3	58a9140f08	Before evict_wb_old removal	2019-11-07 13:27:38 -05:00
felsabbagh3	9e2de897f0	Added simple_main	2019-11-07 00:10:06 -05:00