felsabbagh3
|
469334f23e
|
MULTICORE WITH L2 WORKING
|
2020-03-09 01:17:11 -07:00 |
|
felsabbagh3
|
3b11e1d72f
|
Cache Working on Mem Copy
|
2020-03-08 01:55:15 -08:00 |
|
felsabbagh3
|
4ed62f1aad
|
Fixed all Cache Warnings
|
2020-03-07 14:34:05 -08:00 |
|
felsabbagh3
|
db11bf6990
|
Made the cache module configurable for multi-instantiation
|
2020-03-07 00:49:40 -08:00 |
|
felsabbagh3
|
90d10f4b7d
|
Added Lower Level Cache Hit Queue
|
2020-03-06 23:04:42 -08:00 |
|
Blaise Tine
|
2ed98a4764
|
synthesis fixes
|
2020-03-05 07:03:23 -05:00 |
|
Blaise Tine
|
369c2c625c
|
synthesis fixes
|
2020-03-05 06:58:51 -05:00 |
|
felsabbagh3
|
7222cdd199
|
Added Snoop Invalidate/Writeback Req type
|
2020-03-05 01:30:16 -08:00 |
|
felsabbagh3
|
c257c0578e
|
Added fill_invalidator
|
2020-03-04 23:55:02 -08:00 |
|
felsabbagh3
|
a86a403ca9
|
New Cache Design Passing All Tests
|
2020-03-04 23:24:32 -08:00 |
|
felsabbagh3
|
aa1a0ee376
|
Passing some cases
|
2020-03-04 04:05:54 -08:00 |
|
felsabbagh3
|
b150327ca9
|
Before fixing miss rsrv for ST->LD sequences
|
2020-03-03 16:57:05 -08:00 |
|
felsabbagh3
|
8784b09b18
|
Finished st0
|
2020-03-03 02:49:30 -08:00 |
|
felsabbagh3
|
f6cc05eaa2
|
Everything except bank internals
|
2020-03-02 23:08:54 -08:00 |
|