17 Commits

Author SHA1 Message Date
Blaise Tine
72b6713a72 updating fdiv/fsqrt bram hex files, reset_delay updaet 2021-02-04 09:02:18 -08:00
Blaise Tine
ce9ef840d6 minor updates 2021-01-18 04:22:40 -08:00
Blaise Tine
d44144f72f FPU float<->int conversion optimization 2020-12-29 15:37:45 -08:00
Blaise Tine
e83c4638a0 FPU area optimization sharing fmadd hard block 2020-12-27 17:31:10 -08:00
Blaise Tine
25df233005 Adding Altera Stratix 10 support 2020-12-27 10:44:57 -08:00
Blaise Tine
4b7d871d62 allowing partial cache request submissions, io bus support broken 2020-12-21 03:53:13 -08:00
Blaise Tine
e0905f8352 minor update 2020-12-09 05:34:27 -08:00
Blaise Tine
42e3b6c45d fixed lmp_mult parameters, ram init filepath 2020-09-04 07:51:46 -07:00
Blaise Tine
c358226098 merge 2020-08-31 09:22:43 -04:00
Blaise Tine
df711986bc FPU DPI fallback 2020-08-31 09:19:55 -04:00
Blaise Tine
af84e01856 minor update 2020-08-31 06:17:49 -07:00
Blaise Tine
f292e5003d quartus build fixes 2020-08-23 22:04:46 -07:00
Blaise Tine
0b355f228e ibuffer addition 2020-08-22 00:22:04 -07:00
Blaise Tine
6c12391338 pipeline refactoring - fmax >= 222 mhz 2020-08-14 21:50:14 -07:00
Blaise Tine
65415d2bbc getting dogfood tests passing on Verilator! 2020-08-09 18:13:12 -04:00
Blaise Tine
ffd9515881 added altera fpu modules 2020-08-05 15:53:59 -07:00
Blaise Tine
836a735555 minor updates 2020-07-31 13:39:52 -07:00