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minor update

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This commit is contained in:
Blaise Tine
2021-04-01 03:20:30 -04:00
parent fa2d84831e
commit fff3fb18fb
4 changed files with 99 additions and 76 deletions
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46
hw/rtl/tex_unit/VX_tex_sampler.v
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@@ -15,9 +15,9 @@ module VX_tex_sampler #(
input wire req_wb,
input wire [`TEX_FILTER_BITS-1:0] req_filter,
input wire [`TEX_FORMAT_BITS-1:0] req_format,
input wire [`NUM_THREADS-1:0][`FIXED_FRAC-1:0] req_u,
input wire [`NUM_THREADS-1:0][`FIXED_FRAC-1:0] req_v,
input wire [`NUM_THREADS-1:0][3:0][31:0] req_texels,
input wire [`NUM_THREADS-1:0][3:0][31:0] req_data,
input wire [`NUM_THREADS-1:0][`BLEND_FRAC-1:0] req_blend_u,
input wire [`NUM_THREADS-1:0][`BLEND_FRAC-1:0] req_blend_v,
output wire req_ready,
// ouputs
@@ -33,7 +33,7 @@ module VX_tex_sampler #(
`UNUSED_PARAM (CORE_ID)
wire [`NUM_THREADS-1:0][31:0] req_data;
wire [`NUM_THREADS-1:0][31:0] result;
wire stall_out;
@@ -42,22 +42,19 @@ module VX_tex_sampler #(
wire [3:0][31:0] fmt_texels;
wire [31:0] texel_ul, texel_uh, texel_v;
wire [`BLEND_FRAC-1:0] blend_u = req_u[i][`BLEND_FRAC-1:0];
wire [`BLEND_FRAC-1:0] blend_v = req_v[i][`BLEND_FRAC-1:0];
for (genvar j = 0; j < 4; j++) begin
VX_tex_format #(
.CORE_ID (CORE_ID)
) tex_format (
.format (req_format),
.texel_in (req_texels[i][j]),
.texel_in (req_data[i][j]),
.texel_out (fmt_texels[j])
);
end
VX_tex_lerp #(
) tex_lerp_ul (
.blend (blend_u),
.blend (req_blend_u[i]),
.in1 (fmt_texels[0]),
.in2 (fmt_texels[1]),
.out (texel_ul)
@@ -65,7 +62,7 @@ module VX_tex_sampler #(
VX_tex_lerp #(
) tex_lerp_uh (
.blend (blend_u),
.blend (req_blend_u[i]),
.in1 (fmt_texels[2]),
.in2 (fmt_texels[3]),
.out (texel_uh)
@@ -73,13 +70,13 @@ module VX_tex_sampler #(
VX_tex_lerp #(
) tex_lerp_v (
.blend (blend_v),
.blend (req_blend_v[i]),
.in1 (texel_ul),
.in2 (texel_uh),
.out (texel_v)
);
assign req_data[i] = req_filter ? texel_v : fmt_texels[0];
assign result[i] = req_filter ? texel_v : fmt_texels[0];
end
assign stall_out = rsp_valid && ~rsp_ready;
@@ -91,11 +88,32 @@ module VX_tex_sampler #(
.clk (clk),
.reset (reset),
.enable (~stall_out),
.data_in ({req_valid, req_wid, req_tmask, req_PC, req_rd, req_wb, req_data}),
.data_in ({req_valid, req_wid, req_tmask, req_PC, req_rd, req_wb, result}),
.data_out ({rsp_valid, rsp_wid, rsp_tmask, rsp_PC, rsp_rd, rsp_wb, rsp_data})
);
// can accept new request?
assign req_ready = ~stall_out;
assign req_ready = ~stall_out;
`ifdef DBG_PRINT_TEX
always @(posedge clk) begin
if (req_valid && req_ready) begin
$write("%t: core%0d-sampler-req: wid=%0d, PC=%0h, tmask=%b, filter=%0d, format=%0d, data=",
$time, CORE_ID, req_wid, req_PC, req_tmask, req_filter, req_format);
`PRINT_ARRAY2D(req_data, 4, `NUM_THREADS);
$write("u0=");
`PRINT_ARRAY2D(req_u0, 4, `NUM_THREADS);
$write("v0=");
`PRINT_ARRAY2D(req_v0, 4, `NUM_THREADS);
$write("\n");
end
if (rsp_valid && rsp_ready) begin
$write("%t: core%0d-sampler-rsp: wid=%0d, PC=%0h, tmask=%b, data=",
$time, CORE_ID, rsp_wid, rsp_PC, rsp_tmask);
`PRINT_ARRAY2D(rsp_data, 4, `NUM_THREADS);
$write("\n");
end
end
`endif
endmodule