ccip write fix
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@@ -215,7 +215,7 @@ extern int vx_dev_open(vx_device_h* hdevice) {
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#ifdef SCOPE
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{
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int ret = vx_scope_start(accel_handle, 0);
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int ret = vx_scope_start(accel_handle, 0, -1);
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if (ret != 0) {
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fpgaClose(accel_handle);
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return ret;
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@@ -235,7 +235,7 @@ extern int vx_dev_close(vx_device_h hdevice) {
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vx_device_t *device = ((vx_device_t*)hdevice);
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#ifdef SCOPE
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vx_scope_stop(device->fpga, 0);
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vx_scope_stop(device->fpga);
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#endif
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#ifdef DUMP_PERF_STATS
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@@ -38,7 +38,7 @@
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#define CMD_GET_DATA 1
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#define CMD_GET_WIDTH 2
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#define CMD_GET_COUNT 3
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#define CMD_SET_DELAY 4
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#define CMD_SET_START 4
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#define CMD_SET_STOP 5
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#define CMD_GET_OFFSET 6
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@@ -58,7 +58,7 @@ static std::mutex g_timeout_mutex;
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static void timeout_callback(fpga_handle fpga) {
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std::this_thread::sleep_for(std::chrono::seconds{HANG_TIMEOUT});
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vx_scope_stop(fpga, HANG_TIMEOUT);
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vx_scope_stop(fpga);
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fpgaClose(fpga);
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exit(0);
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}
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@@ -101,16 +101,21 @@ void dump_module(std::ofstream& ofs, int parent) {
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}
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}
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int vx_scope_start(fpga_handle hfpga, uint64_t delay) {
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int vx_scope_start(fpga_handle hfpga, uint64_t start_time, uint64_t stop_time) {
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if (nullptr == hfpga)
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return -1;
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if (delay != uint64_t(-1)) {
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// set start delay
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uint64_t cmd_delay = ((delay << 3) | CMD_SET_DELAY);
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CHECK_RES(fpgaWriteMMIO64(hfpga, 0, MMIO_SCOPE_WRITE, cmd_delay));
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std::cout << "scope start delay: " << std::dec << delay << "s" << std::endl;
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if (stop_time != uint64_t(-1)) {
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// set stop time
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uint64_t cmd_stop = ((stop_time << 3) | CMD_SET_STOP);
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CHECK_RES(fpgaWriteMMIO64(hfpga, 0, MMIO_SCOPE_WRITE, cmd_stop));
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std::cout << "scope stop time: " << std::dec << stop_time << "s" << std::endl;
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}
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// start recording
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uint64_t cmd_delay = ((start_time << 3) | CMD_SET_START);
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CHECK_RES(fpgaWriteMMIO64(hfpga, 0, MMIO_SCOPE_WRITE, cmd_delay));
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std::cout << "scope start time: " << std::dec << start_time << "s" << std::endl;
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#ifdef HANG_TIMEOUT
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g_timeout_thread = std::thread(timeout_callback, hfpga);
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@@ -120,7 +125,7 @@ int vx_scope_start(fpga_handle hfpga, uint64_t delay) {
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return 0;
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}
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int vx_scope_stop(fpga_handle hfpga, uint64_t delay) {
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int vx_scope_stop(fpga_handle hfpga) {
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#ifdef HANG_TIMEOUT
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if (!g_timeout_mutex.try_lock())
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return 0;
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@@ -128,13 +133,10 @@ int vx_scope_stop(fpga_handle hfpga, uint64_t delay) {
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if (nullptr == hfpga)
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return -1;
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if (delay != uint64_t(-1)) {
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// stop recording
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uint64_t cmd_stop = ((delay << 3) | CMD_SET_STOP);
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CHECK_RES(fpgaWriteMMIO64(hfpga, 0, MMIO_SCOPE_WRITE, cmd_stop));
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std::cout << "scope stop delay: " << std::dec << delay << "s" << std::endl;
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}
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// forced stop
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uint64_t cmd_stop = ((0 << 3) | CMD_SET_STOP);
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CHECK_RES(fpgaWriteMMIO64(hfpga, 0, MMIO_SCOPE_WRITE, cmd_stop));
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std::cout << "scope trace dump begin..." << std::endl;
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@@ -6,6 +6,6 @@
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#define HANG_TIMEOUT (30*60)
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#endif
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int vx_scope_start(fpga_handle hfpga, uint64_t delay = -1);
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int vx_scope_start(fpga_handle hfpga, uint64_t start_time = 0, uint64_t stop_time = -1);
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int vx_scope_stop(fpga_handle hfpga, uint64_t delay = -1);
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int vx_scope_stop(fpga_handle hfpga);
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