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Added ISA2 infrastructure with bugs

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This commit is contained in:
felsabbagh3
2019-10-18 05:21:32 -04:00
parent 629ed3f8f9
commit f7b55427b4
11 changed files with 124 additions and 86 deletions
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32
rtl/VX_inst_multiplex.v
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@@ -5,16 +5,23 @@ module VX_inst_multiplex (
// Outputs
VX_exec_unit_req_inter VX_exec_unit_req,
VX_lsu_req_inter VX_lsu_req
VX_lsu_req_inter VX_lsu_req,
VX_gpu_inst_req_inter VX_gpu_inst_req
);
wire[`NT_M1:0] is_mem_mask;
wire is_mem = (VX_bckE_req.mem_write != `NO_MEM_WRITE) || (VX_bckE_req.mem_read != `NO_MEM_READ);
wire[`NT_M1:0] is_gpu_mask;
wire is_mem = (VX_bckE_req.mem_write != `NO_MEM_WRITE) || (VX_bckE_req.mem_read != `NO_MEM_READ);
// wire is_gpu = (VX_bckE_req.is_wspawn || VX_bckE_req.is_tmc || VX_bckE_req.is_barrier || VX_bckE_req.is_split);
wire is_gpu = 0;
genvar currT;
for (currT = 0; currT < `NT; currT = currT + 1) assign is_mem_mask[currT] = is_mem;
for (currT = 0; currT < `NT; currT = currT + 1) begin
assign is_mem_mask[currT] = is_mem;
assign is_gpu_mask[currT] = is_gpu;
end
// LSU Unit
assign VX_lsu_req.valid = VX_bckE_req.valid & is_mem_mask;
@@ -31,7 +38,7 @@ module VX_inst_multiplex (
// Execute Unit
assign VX_exec_unit_req.valid = VX_bckE_req.valid & (~is_mem_mask);
assign VX_exec_unit_req.valid = VX_bckE_req.valid & (~is_mem_mask & ~is_gpu_mask);
assign VX_exec_unit_req.warp_num = VX_bckE_req.warp_num;
assign VX_exec_unit_req.curr_PC = VX_bckE_req.curr_PC;
assign VX_exec_unit_req.PC_next = VX_bckE_req.PC_next;
@@ -49,7 +56,6 @@ module VX_inst_multiplex (
assign VX_exec_unit_req.jalQual = VX_bckE_req.jalQual;
assign VX_exec_unit_req.jal = VX_bckE_req.jal;
assign VX_exec_unit_req.jal_offset = VX_bckE_req.jal_offset;
assign VX_exec_unit_req.wspawn = VX_bckE_req.wspawn;
assign VX_exec_unit_req.ebreak = VX_bckE_req.ebreak;
assign VX_exec_unit_req.is_csr = VX_bckE_req.is_csr;
assign VX_exec_unit_req.csr_address = VX_bckE_req.csr_address;
@@ -57,4 +63,18 @@ module VX_inst_multiplex (
assign VX_exec_unit_req.csr_mask = VX_bckE_req.csr_mask;
endmodule
// GPR Req
assign VX_gpu_inst_req.valid = VX_bckE_req.valid & is_gpu_mask;
assign VX_gpu_inst_req.warp_num = VX_bckE_req.warp_num;
assign VX_gpu_inst_req.is_wspawn = VX_bckE_req.is_wspawn;
assign VX_gpu_inst_req.is_tmc = VX_bckE_req.is_tmc;
assign VX_gpu_inst_req.is_split = VX_bckE_req.is_split;
assign VX_gpu_inst_req.is_barrier = VX_bckE_req.is_barrier;
assign VX_gpu_inst_req.a_reg_data = VX_gpr_data.a_reg_data;
assign VX_gpu_inst_req.rd2 = VX_gpr_data.b_reg_data[0];
endmodule