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quartus build fixes

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This commit is contained in:
Blaise Tine
2020-08-23 22:04:46 -07:00
parent 1c9445745f
commit f292e5003d
27 changed files with 241 additions and 206 deletions
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2
hw/rtl/fp_cores/VX_fp_fpga.v
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@@ -38,7 +38,7 @@ module VX_fp_fpga #(
wire [NUM_FPC-1:0] per_core_valid_out;
wire fpnew_has_fflags;
fflags_t fpnew_fflags;
fflags_t [`NUM_THREADS-1:0] fpnew_fflags;
reg [FPC_BITS-1:0] core_select;
reg fmadd_negate;

12
hw/rtl/fp_cores/VX_fp_noncomp.v
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@@ -71,15 +71,15 @@ module VX_fp_noncomp #(
fp_type_t tmp_a_type, tmp_b_type;
VX_fp_type fp_type_a (
.exponent(tmp_a_exponent[i]),
.mantissa(tmp_a_mantissa[i]),
.o_type(tmp_a_type[i])
.exponent(tmp_a_exponent),
.mantissa(tmp_a_mantissa),
.o_type(tmp_a_type)
);
VX_fp_type fp_type_b (
.exponent(tmp_b_exponent[i]),
.mantissa(tmp_b_mantissa[i]),
.o_type(tmp_b_type[i])
.exponent(tmp_b_exponent),
.mantissa(tmp_b_mantissa),
.o_type(tmp_b_type)
);
wire tmp_a_smaller = (dataa[i] < datab[i]) ^ (tmp_a_sign || tmp_b_sign);

2
hw/rtl/fp_cores/altera/VX_fp_madd.v
View File

@@ -131,7 +131,7 @@ module VX_fp_madd #(
.clk(clk),
.reset(reset),
.enable(enable1),
.in({in_tag_st0, in_valid_st0}),
.in({out_tag_st0, in_valid_st0}),
.out({out_tag_st1, out_valid_st1})
);

2
hw/rtl/fp_cores/altera/VX_fp_msub.v
View File

@@ -131,7 +131,7 @@ module VX_fp_msub #(
.clk(clk),
.reset(reset),
.enable(enable1),
.in({in_tag_st0, in_valid_st0}),
.in({out_tag_st0, in_valid_st0}),
.out({out_tag_st1, out_valid_st1})
);