minor update

2023-11-27 02:04:53 -08:00
parent 2f1171ca76
commit ebec982434
9 changed files with 15 additions and 15 deletions
--- a/hw/rtl/libs/VX_mem_adapter.sv
+++ b/hw/rtl/libs/VX_mem_adapter.sv
@@ -21,8 +21,8 @@ module VX_mem_adapter #(
    parameter DST_ADDR_WIDTH = 1,                
    parameter SRC_TAG_WIDTH  = 1,
    parameter DST_TAG_WIDTH  = 1,
-    parameter OUT_REG_REQ   = 0,
-    parameter OUT_REG_RSP   = 0
+    parameter OUT_REG_REQ    = 0,
+    parameter OUT_REG_RSP    = 0
 ) (
    input wire                          clk,
    input wire                          reset,