regression fixes
This commit is contained in:
@@ -8,7 +8,17 @@ all:
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$(MAKE) -C printf
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$(MAKE) -C psort
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run:
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run-simx:
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$(MAKE) -C vecadd run-simx
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$(MAKE) -C sgemm run-simx
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$(MAKE) -C saxpy run-simx
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$(MAKE) -C sfilter run-simx
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$(MAKE) -C nearn run-simx
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$(MAKE) -C guassian run-simx
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$(MAKE) -C printf run-simx
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#$(MAKE) -C psort run-simx
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run-vlsim:
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$(MAKE) -C vecadd run-vlsim
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$(MAKE) -C sgemm run-vlsim
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$(MAKE) -C saxpy run-vlsim
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@@ -16,7 +26,7 @@ run:
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$(MAKE) -C nearn run-vlsim
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$(MAKE) -C guassian run-vlsim
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$(MAKE) -C printf run-vlsim
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#$(MAKE) -C psort run-vlsim
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#$(MAKE) -C psort run-vlsim
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clean:
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$(MAKE) -C vecadd clean
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@@ -8,7 +8,17 @@ all:
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$(MAKE) -C diverge
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$(MAKE) -C fence
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run:
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run-simx:
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$(MAKE) -C basic run-simx
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$(MAKE) -C demo run-simx
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$(MAKE) -C dogfood run-simx
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$(MAKE) -C mstress run-simx
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$(MAKE) -C io_addr run-simx
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$(MAKE) -C printf run-simx
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$(MAKE) -C diverge run-simx
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$(MAKE) -C fence run-simx
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run-vlsim:
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$(MAKE) -C basic run-vlsim
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$(MAKE) -C demo run-vlsim
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$(MAKE) -C dogfood run-vlsim
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@@ -1,6 +1,9 @@
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all:
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run:
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$(MAKE) -C isa run
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run-simx:
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$(MAKE) -C isa run-simx
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run-rtlsim:
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$(MAKE) -C isa run-rtlsim
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clean:
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@@ -1,8 +1,13 @@
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TESTS := $(wildcard *.hex)
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ALL_TESTS := $(wildcard *.hex)
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VTESTS := $(wildcard *-v-*.hex)
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V_TESTS := $(wildcard *-v-*.hex)
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TESTS := $(filter-out $(VTESTS) rv32si-p-scall.hex rv32si-p-sbreak.hex rv32mi-p-breakpoint.hex rv32ud-p-fclass.hex rv32ua-p-amomax_w.hex rv32ua-p-amoxor_w.hex rv32ud-p-ldst.hex rv32ua-p-amoor_w.hex rv32mi-p-ma_addr.hex rv32ud-p-fdiv.hex rv32ud-p-fcmp.hex rv32mi-p-mcsr.hex rv32ua-p-amoswap_w.hex rv32mi-p-ma_fetch.hex rv32mi-p-csr.hex rv32ua-p-amoadd_w.hex rv32si-p-dirty.hex rv32ud-p-fcvt.hex rv32ui-p-fence_i.hex rv32si-p-csr.hex rv32mi-p-shamt.hex rv32ua-p-amomin_w.hex rv32ua-p-lrsc.hex rv32ud-p-fmadd.hex rv32ud-p-fadd.hex rv32si-p-wfi.hex rv32ua-p-amomaxu_w.hex rv32si-p-ma_fetch.hex rv32ud-p-fmin.hex rv32mi-p-illegal.hex rv32uc-p-rvc.hex rv32mi-p-sbreak.hex rv32ua-p-amominu_w.hex rv32ua-p-amoand_w.hex, $(TESTS))
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EXCLUDED_TESTS := $(V_TESTS) rv32si-p-scall.hex rv32si-p-sbreak.hex rv32mi-p-breakpoint.hex rv32ud-p-fclass.hex rv32ua-p-amomax_w.hex rv32ua-p-amoxor_w.hex rv32ud-p-ldst.hex rv32ua-p-amoor_w.hex rv32mi-p-ma_addr.hex rv32ud-p-fdiv.hex rv32ud-p-fcmp.hex rv32mi-p-mcsr.hex rv32ua-p-amoswap_w.hex rv32mi-p-ma_fetch.hex rv32mi-p-csr.hex rv32ua-p-amoadd_w.hex rv32si-p-dirty.hex rv32ud-p-fcvt.hex rv32ui-p-fence_i.hex rv32si-p-csr.hex rv32mi-p-shamt.hex rv32ua-p-amomin_w.hex rv32ua-p-lrsc.hex rv32ud-p-fmadd.hex rv32ud-p-fadd.hex rv32si-p-wfi.hex rv32ua-p-amomaxu_w.hex rv32si-p-ma_fetch.hex rv32ud-p-fmin.hex rv32mi-p-illegal.hex rv32uc-p-rvc.hex rv32mi-p-sbreak.hex rv32ua-p-amominu_w.hex rv32ua-p-amoand_w.hex
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run:
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cd ../../../hw/simulate/obj_dir && ./VVortex -r $(foreach test,$(TESTS),../../../tests/riscv/isa/$(test))
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TESTS := $(filter-out $(EXCLUDED_TESTS), $(ALL_TESTS))
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run-simx:
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$(foreach test,$(TESTS), ../../../simX/simX -r -a rv32i -c 1 -i $(test);)
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run-rtlsim:
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$(foreach test,$(TESTS), ../../../hw/simulate/obj_dir/VVortex -r $(test);)
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@@ -3,10 +3,15 @@ all:
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$(MAKE) -C fibonacci
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$(MAKE) -C simple
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run:
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$(MAKE) -C hello run
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$(MAKE) -C fibonacci run
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$(MAKE) -C simple run
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run-simx:
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$(MAKE) -C hello run-simx
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$(MAKE) -C fibonacci run-simx
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$(MAKE) -C simple run-simx
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run-rtlsim:
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$(MAKE) -C hello run-rtlsim
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$(MAKE) -C fibonacci run-rtlsim
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$(MAKE) -C simple run-rtlsim
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clean:
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$(MAKE) -C hello clean
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@@ -26,11 +26,11 @@ $(PROJECT).hex: $(PROJECT).elf
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$(PROJECT).elf: $(SRCS)
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$(CC) $(CFLAGS) $(SRCS) $(LDFLAGS) -o $(PROJECT).elf
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run: $(PROJECT).hex
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run-rtlsim: $(PROJECT).hex
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../../../hw/simulate/obj_dir/VVortex $(PROJECT).hex
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run-simx: $(PROJECT).hex
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../../../simX/simX -a rv32i -i $(PROJECT).hex
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../../../simX/simX -a rv32i -c 1 -i $(PROJECT).hex
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.depend: $(SRCS)
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$(CC) $(CFLAGS) -MM $^ > .depend;
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@@ -26,11 +26,11 @@ $(PROJECT).hex: $(PROJECT).elf
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$(PROJECT).elf: $(SRCS)
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$(CC) $(CFLAGS) $(SRCS) $(LDFLAGS) -o $(PROJECT).elf
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run: $(PROJECT).hex
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run-rtlsim: $(PROJECT).hex
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../../../hw/simulate/obj_dir/VVortex $(PROJECT).hex
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run-simx: $(PROJECT).hex
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../../../simX/simX -a rv32i -i $(PROJECT).hex
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../../../simX/simX -a rv32i -c 1 -i $(PROJECT).hex
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.depend: $(SRCS)
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$(CC) $(CFLAGS) -MM $^ > .depend;
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@@ -26,11 +26,11 @@ $(PROJECT).hex: $(PROJECT).elf
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$(PROJECT).elf: $(SRCS)
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$(CC) $(CFLAGS) $(SRCS) $(LDFLAGS) -o $(PROJECT).elf
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run: $(PROJECT).hex
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run-rtlsim: $(PROJECT).hex
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../../../hw/simulate/obj_dir/VVortex $(PROJECT).hex
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run-simx: $(PROJECT).hex
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../../../simX/simX -a rv32i -i $(PROJECT).hex
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../../../simX/simX -a rv32i -c 1 -i $(PROJECT).hex
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.depend: $(SRCS)
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$(CC) $(CFLAGS) -MM $^ > .depend;
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