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Modified RV32F instructions to support 64-bit register file and added RV64F ISA extension

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This commit is contained in:
Santosh Raghav Srivatsan
2021-12-06 18:55:13 -05:00
parent 30a0d34151
commit e6eda67d0c
21 changed files with 459 additions and 316 deletions
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74
sim/simX/instr.h
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@@ -34,7 +34,7 @@ enum Opcode {
// GPGPU Extension
GPGPU = 0x6b,
// simx64
// RV64I Extension
// RV64 Standard Extensions
R_INST_64 = 0x3b,
I_INST_64 = 0x1b,
};
@@ -73,39 +73,39 @@ public:
void setSrcFReg(int srcReg) { rsrc_type_[num_rsrcs_] = 2; rsrc_[num_rsrcs_++] = srcReg; }
void setDestVReg(int destReg) { rdest_type_ = 3; rdest_ = destReg; }
void setSrcVReg(int srcReg) { rsrc_type_[num_rsrcs_] = 3; rsrc_[num_rsrcs_++] = srcReg; }
void setFunc3(HalfWord func3) { func3_ = func3; }
void setFunc7(HalfWord func7) { func7_ = func7; }
void setImm(Word imm) { has_imm_ = true; imm_ = imm; }
void setVlsWidth(HalfWord width) { vlsWidth_ = width; }
void setVmop(HalfWord mop) { vMop_ = mop; }
void setVnf(HalfWord nf) { vNf_ = nf; }
void setVmask(HalfWord mask) { vmask_ = mask; }
void setVs3(HalfWord vs) { vs3_ = vs; }
void setVlmul(HalfWord lmul) { vlmul_ = 1 << lmul; }
void setVsew(HalfWord sew) { vsew_ = 1 << (3+sew); }
void setVediv(HalfWord ediv) { vediv_ = 1 << ediv; }
void setFunc6(HalfWord func6) { func6_ = func6; }
void setFunc3(Word func3) { func3_ = func3; }
void setFunc7(Word func7) { func7_ = func7; }
void setImm(DoubleWord imm) { has_imm_ = true; imm_ = imm; }
void setVlsWidth(Word width) { vlsWidth_ = width; }
void setVmop(Word mop) { vMop_ = mop; }
void setVnf(Word nf) { vNf_ = nf; }
void setVmask(Word mask) { vmask_ = mask; }
void setVs3(Word vs) { vs3_ = vs; }
void setVlmul(Word lmul) { vlmul_ = 1 << lmul; }
void setVsew(Word sew) { vsew_ = 1 << (3+sew); }
void setVediv(Word ediv) { vediv_ = 1 << ediv; }
void setFunc6(Word func6) { func6_ = func6; }
/* Getters used by encoders. */
Opcode getOpcode() const { return opcode_; }
HalfWord getFunc3() const { return func3_; }
HalfWord getFunc6() const { return func6_; }
HalfWord getFunc7() const { return func7_; }
Word getFunc3() const { return func3_; }
Word getFunc6() const { return func6_; }
Word getFunc7() const { return func7_; }
int getNRSrc() const { return num_rsrcs_; }
int getRSrc(int i) const { return rsrc_[i]; }
int getRSType(int i) const { return rsrc_type_[i]; }
int getRDest() const { return rdest_; }
int getRDType() const { return rdest_type_; }
bool hasImm() const { return has_imm_; }
Word getImm() const { return imm_; }
HalfWord getVlsWidth() const { return vlsWidth_; }
HalfWord getVmop() const { return vMop_; }
HalfWord getvNf() const { return vNf_; }
HalfWord getVmask() const { return vmask_; }
HalfWord getVs3() const { return vs3_; }
HalfWord getVlmul() const { return vlmul_; }
HalfWord getVsew() const { return vsew_; }
HalfWord getVediv() const { return vediv_; }
DoubleWord getImm() const { return imm_; }
Word getVlsWidth() const { return vlsWidth_; }
Word getVmop() const { return vMop_; }
Word getvNf() const { return vNf_; }
Word getVmask() const { return vmask_; }
Word getVs3() const { return vs3_; }
Word getVlmul() const { return vlmul_; }
Word getVsew() const { return vsew_; }
Word getVediv() const { return vediv_; }
private:
@@ -120,23 +120,23 @@ private:
int isrc_mask_;
int fsrc_mask_;
int vsrc_mask_;
Word imm_;
DoubleWord imm_;
int rsrc_type_[MAX_REG_SOURCES];
int rsrc_[MAX_REG_SOURCES];
int rdest_;
HalfWord func3_;
HalfWord func7_;
Word func3_;
Word func7_;
//Vector
HalfWord vmask_;
HalfWord vlsWidth_;
HalfWord vMop_;
HalfWord vNf_;
HalfWord vs3_;
HalfWord vlmul_;
HalfWord vsew_;
HalfWord vediv_;
HalfWord func6_;
Word vmask_;
Word vlsWidth_;
Word vMop_;
Word vNf_;
Word vs3_;
Word vlmul_;
Word vsew_;
Word vediv_;
Word func6_;
friend std::ostream &operator<<(std::ostream &, const Instr&);
};