diff --git a/hw/rtl/fp_cores/VX_fp_div.v b/hw/rtl/fp_cores/VX_fp_div.v
index 59919776..a3db6f15 100644
--- a/hw/rtl/fp_cores/VX_fp_div.v
+++ b/hw/rtl/fp_cores/VX_fp_div.v
@@ -33,6 +33,7 @@ module VX_fp_div #(
     wire stall = ~ready_out && valid_out;
     wire enable = ~stall;
 
+`ifndef VERILATOR
     wire [LANES-1:0] fdiv_reset;
     VX_reset_relay #(
         .DEPTH (LANES > 1),
@@ -42,6 +43,7 @@ module VX_fp_div #(
         .reset   (reset),
         .reset_o (fdiv_reset)
     );
+`endif
 
     for (genvar i = 0; i < LANES; i++) begin        
     `ifdef VERILATOR
@@ -59,7 +61,7 @@ module VX_fp_div #(
             .RESETW (1)
         ) shift_req_dpi (
             .clk      (clk),
-            .reset    (fdiv_reset[i]),
+            .reset    (reset),
             .enable   (enable),
             .data_in  (r),
             .data_out (result[i])
diff --git a/hw/rtl/fp_cores/VX_fp_fma.v b/hw/rtl/fp_cores/VX_fp_fma.v
index 4d095823..55e9b04c 100644
--- a/hw/rtl/fp_cores/VX_fp_fma.v
+++ b/hw/rtl/fp_cores/VX_fp_fma.v
@@ -39,6 +39,18 @@ module VX_fp_fma #(
     wire stall = ~ready_out && valid_out;
     wire enable = ~stall;
 
+`ifndef VERILATOR
+    wire [LANES-1:0] fma_reset;
+    VX_reset_relay #(
+        .DEPTH (LANES > 1),
+        .NUM_NODES (LANES)
+    ) reset_relay (
+        .clk     (clk),
+        .reset   (reset),
+        .reset_o (fma_reset)
+    );
+`endif
+
     for (genvar i = 0; i < LANES; i++) begin       
         reg [31:0] a, b, c;
 
@@ -86,7 +98,7 @@ module VX_fp_fma #(
     `else
         acl_fmadd fmadd (
             .clk    (clk),
-            .areset (reset),
+            .areset (fma_reset[i]),
             .en     (enable),
             .a      (a),
             .b      (b),
diff --git a/hw/rtl/fp_cores/VX_fp_sqrt.v b/hw/rtl/fp_cores/VX_fp_sqrt.v
index 279ea54d..541b98cc 100644
--- a/hw/rtl/fp_cores/VX_fp_sqrt.v
+++ b/hw/rtl/fp_cores/VX_fp_sqrt.v
@@ -32,6 +32,7 @@ module VX_fp_sqrt #(
     wire stall = ~ready_out && valid_out;
     wire enable = ~stall;
 
+`ifndef VERILATOR
     wire [LANES-1:0] fsqrt_reset;
     VX_reset_relay #(
         .DEPTH (LANES > 1),
@@ -41,6 +42,7 @@ module VX_fp_sqrt #(
         .reset   (reset),
         .reset_o (fsqrt_reset)
     );
+`endif
     
     for (genvar i = 0; i < LANES; i++) begin
     `ifdef VERILATOR
@@ -58,7 +60,7 @@ module VX_fp_sqrt #(
             .RESETW (1)
         ) shift_req_dpi (
             .clk      (clk),
-            .reset    (fsqrt_reset[i]),
+            .reset    (reset),
             .enable   (enable),
             .data_in  (r),
             .data_out (result[i])