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pipeline refactoring

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This commit is contained in:
Blaise Tine
2020-07-21 05:22:47 -04:00
parent e2100e9e87
commit dc7efbcfb4
31 changed files with 1437 additions and 6038 deletions
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14
hw/rtl/interfaces/VX_lsu_req_if.v
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@@ -6,15 +6,19 @@
interface VX_lsu_req_if ();
wire [`NUM_THREADS-1:0] valid;
wire [31:0] curr_PC;
wire [`NW_BITS-1:0] warp_num;
wire [`NUM_THREADS-1:0][31:0] store_data;
wire [`NUM_THREADS-1:0][31:0] base_addr;
wire [31:0] offset;
wire [31:0] curr_PC;
wire rw;
wire [`BYTEEN_BITS-1:0] byteen;
wire [`NR_BITS-1:0] rd;
wire [`WB_BITS-1:0] wb;
wire [`NR_BITS-1:0] rd;
wire [`NUM_THREADS-1:0][31:0] store_data;
wire [`NUM_THREADS-1:0][31:0] base_addr;
wire [31:0] offset;
wire ready;
endinterface