pipeline refactoring

2020-07-21 05:22:47 -04:00
parent e2100e9e87
commit dc7efbcfb4
31 changed files with 1437 additions and 6038 deletions
--- a/hw/rtl/interfaces/VX_alu_req_if.v
+++ b/hw/rtl/interfaces/VX_alu_req_if.v
@@ -11,14 +11,14 @@ interface VX_alu_req_if ();
    
    wire [`ALU_BITS-1:0]    alu_op;

+    wire [`WB_BITS-1:0]     wb;
+    wire [`NR_BITS-1:0]     rd;
+
    wire [`NUM_THREADS-1:0][31:0] rs1_data;
    wire [`NUM_THREADS-1:0][31:0] rs2_data;

    wire [31:0]             offset;
-    wire [31:0]             next_PC;
-    
-    wire [`NR_BITS-1:0]     rd;    
-    wire [`WB_BITS-1:0]     wb;
+    wire [31:0]             next_PC;    
    
    wire                    ready;