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minor update

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This commit is contained in:
Blaise Tine
2020-08-01 14:38:31 -07:00
parent 28a2f77725
commit d8bdaa2b4e
4 changed files with 26 additions and 22 deletions
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16
hw/rtl/libs/VX_divide.v
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@@ -25,7 +25,7 @@ module VX_divide #(
wire [WIDTHN-1:0] quotient_unqual;
wire [WIDTHD-1:0] remainder_unqual;
lpm_divide quartus_div (
lpm_divide divide (
.clock (clk),
.numer (numer),
.denom (denom),
@@ -36,13 +36,13 @@ module VX_divide #(
);
defparam
quartus_div.lpm_type = "LPM_DIVIDE",
quartus_div.lpm_widthn = WIDTHN,
quartus_div.lpm_widthd = WIDTHD,
quartus_div.lpm_nrepresentation = NSIGNED ? "SIGNED" : "UNSIGNED",
quartus_div.lpm_drepresentation = DSIGNED ? "SIGNED" : "UNSIGNED",
quartus_div.lpm_hint = "MAXIMIZE_SPEED=6,LPM_REMAINDERPOSITIVE=FALSE",
quartus_div.lpm_pipeline = PIPELINE;
divide.lpm_type = "LPM_DIVIDE",
divide.lpm_widthn = WIDTHN,
divide.lpm_widthd = WIDTHD,
divide.lpm_nrepresentation = NSIGNED ? "SIGNED" : "UNSIGNED",
divide.lpm_drepresentation = DSIGNED ? "SIGNED" : "UNSIGNED",
divide.lpm_hint = "MAXIMIZE_SPEED=9,LPM_REMAINDERPOSITIVE=FALSE",
divide.lpm_pipeline = PIPELINE;
assign quotient = quotient_unqual [WIDTHQ-1:0];
assign remainder = remainder_unqual [WIDTHR-1:0];