minor fix
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@@ -91,4 +91,4 @@ lsof +D build_ase_1c
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make -C pipeline > pipeline/build.log 2>&1 &
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make -C pipeline > pipeline/build.log 2>&1 &
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make -C cache > cache/build.log 2>&1 &
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make -C cache > cache/build.log 2>&1 &
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make -C vortex > vortex/build.log 2>&1 &
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make -C vortex > vortex/build.log 2>&1 &
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make -C pipeline > pipeline/build.log 2>&1 &
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make -C top > top/build.log 2>&1 &
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@@ -21,7 +21,7 @@ module VX_lsu_unit #(
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output wire delay
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output wire delay
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);
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);
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VX_wb_if mem_wb_if;
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VX_wb_if mem_wb_if();
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wire[`NUM_THREADS-1:0][31:0] use_address;
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wire[`NUM_THREADS-1:0][31:0] use_address;
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wire[`NUM_THREADS-1:0][31:0] use_store_data;
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wire[`NUM_THREADS-1:0][31:0] use_store_data;
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@@ -161,8 +161,6 @@ module VX_lsu_unit #(
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// Can't accept new response
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// Can't accept new response
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assign dcache_rsp_if.core_rsp_ready = !no_slot_mem & (|mem_wb_if_p1.valid);
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assign dcache_rsp_if.core_rsp_ready = !no_slot_mem & (|mem_wb_if_p1.valid);
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// From LSU to WB
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// From LSU to WB
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localparam WB_REQ_SIZE = (`NUM_THREADS) + (`NUM_THREADS * 32) + (`NW_BITS) + (5) + (2) + 32;
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localparam WB_REQ_SIZE = (`NUM_THREADS) + (`NUM_THREADS * 32) + (`NW_BITS) + (5) + (2) + 32;
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VX_generic_register #(.N(WB_REQ_SIZE)) lsu_to_wb(
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VX_generic_register #(.N(WB_REQ_SIZE)) lsu_to_wb(
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