wu-arch/vortex
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

cache uuid support

Browse Source
This commit is contained in:
Blaise Tine
2021-12-09 20:43:22 -05:00
parent 0e2de4f13a
commit d7737542e4
36 changed files with 159 additions and 200 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
hw/rtl/interfaces/VX_alu_req_if.sv
View File

@@ -6,7 +6,7 @@
interface VX_alu_req_if ();
wire valid;
wire [63:0] uuid;
wire [`UUID_BITS-1:0] uuid;
wire [`NW_BITS-1:0] wid;
wire [`NUM_THREADS-1:0] tmask;
wire [31:0] PC;

2
hw/rtl/interfaces/VX_commit_if.sv
View File

@@ -6,7 +6,7 @@
interface VX_commit_if ();
wire valid;
wire [63:0] uuid;
wire [`UUID_BITS-1:0] uuid;
wire [`NW_BITS-1:0] wid;
wire [`NUM_THREADS-1:0] tmask;
wire [31:0] PC;

2
hw/rtl/interfaces/VX_csr_req_if.sv
View File

@@ -6,7 +6,7 @@
interface VX_csr_req_if ();
wire valid;
wire [63:0] uuid;
wire [`UUID_BITS-1:0] uuid;
wire [`NW_BITS-1:0] wid;
wire [`NUM_THREADS-1:0] tmask;
wire [31:0] PC;

2
hw/rtl/interfaces/VX_decode_if.sv
View File

@@ -6,7 +6,7 @@
interface VX_decode_if ();
wire valid;
wire [63:0] uuid;
wire [`UUID_BITS-1:0] uuid;
wire [`NW_BITS-1:0] wid;
wire [`NUM_THREADS-1:0] tmask;
wire [31:0] PC;

2
hw/rtl/interfaces/VX_fpu_req_if.sv
View File

@@ -6,7 +6,7 @@
interface VX_fpu_req_if ();
wire valid;
wire [63:0] uuid;
wire [`UUID_BITS-1:0] uuid;
wire [`NW_BITS-1:0] wid;
wire [`NUM_THREADS-1:0] tmask;
wire [31:0] PC;

2
hw/rtl/interfaces/VX_gpu_req_if.sv
View File

@@ -6,7 +6,7 @@
interface VX_gpu_req_if();
wire valid;
wire [63:0] uuid;
wire [`UUID_BITS-1:0] uuid;
wire [`NW_BITS-1:0] wid;
wire [`NUM_THREADS-1:0] tmask;
wire [31:0] PC;

2
hw/rtl/interfaces/VX_ibuffer_if.sv
View File

@@ -6,7 +6,7 @@
interface VX_ibuffer_if ();
wire valid;
wire [63:0] uuid;
wire [`UUID_BITS-1:0] uuid;
wire [`NW_BITS-1:0] wid;
wire [`NUM_THREADS-1:0] tmask;
wire [31:0] PC;

2
hw/rtl/interfaces/VX_ifetch_req_if.sv
View File

@@ -6,7 +6,7 @@
interface VX_ifetch_req_if ();
wire valid;
wire [63:0] uuid;
wire [`UUID_BITS-1:0] uuid;
wire [`NUM_THREADS-1:0] tmask;
wire [`NW_BITS-1:0] wid;
wire [31:0] PC;

2
hw/rtl/interfaces/VX_ifetch_rsp_if.sv
View File

@@ -6,7 +6,7 @@
interface VX_ifetch_rsp_if ();
wire valid;
wire [63:0] uuid;
wire [`UUID_BITS-1:0] uuid;
wire [`NUM_THREADS-1:0] tmask;
wire [`NW_BITS-1:0] wid;
wire [31:0] PC;

2
hw/rtl/interfaces/VX_lsu_req_if.sv
View File

@@ -6,7 +6,7 @@
interface VX_lsu_req_if ();
wire valid;
wire [63:0] uuid;
wire [`UUID_BITS-1:0] uuid;
wire [`NW_BITS-1:0] wid;
wire [`NUM_THREADS-1:0] tmask;
wire [31:0] PC;

7
hw/rtl/interfaces/VX_tex_csr_if.sv
View File

@@ -8,17 +8,20 @@ interface VX_tex_csr_if ();
wire write_enable;
wire [`CSR_ADDR_BITS-1:0] write_addr;
wire [31:0] write_data;
wire [`UUID_BITS-1:0] write_uuid;
modport master (
output write_enable,
output write_addr,
output write_data
output write_data,
output write_uuid
);
modport slave (
input write_enable,
input write_addr,
input write_data
input write_data,
input write_uuid
);
endinterface

2
hw/rtl/interfaces/VX_tex_req_if.sv
View File

@@ -6,7 +6,7 @@
interface VX_tex_req_if ();
wire valid;
wire [63:0] uuid;
wire [`UUID_BITS-1:0] uuid;
wire [`NW_BITS-1:0] wid;
wire [`NUM_THREADS-1:0] tmask;
wire [31:0] PC;

2
hw/rtl/interfaces/VX_tex_rsp_if.sv
View File

@@ -6,7 +6,7 @@
interface VX_tex_rsp_if ();
wire valid;
wire [63:0] uuid;
wire [`UUID_BITS-1:0] uuid;
wire [`NW_BITS-1:0] wid;
wire [`NUM_THREADS-1:0] tmask;
wire [31:0] PC;

2
hw/rtl/interfaces/VX_writeback_if.sv
View File

@@ -6,7 +6,7 @@
interface VX_writeback_if ();
wire valid;
wire [63:0] uuid;
wire [`UUID_BITS-1:0] uuid;
wire [`NUM_THREADS-1:0] tmask;
wire [`NW_BITS-1:0] wid;
wire [31:0] PC;