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cache req datapath optimizations

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This commit is contained in:
Blaise Tine
2020-12-08 02:58:08 -08:00
parent 268ad15098
commit d5fa82f5e4
17 changed files with 393 additions and 410 deletions
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45
hw/rtl/VX_csr_io_arb.v
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@@ -4,14 +4,14 @@ module VX_csr_io_arb #(
parameter NUM_REQS = 1,
parameter DATA_WIDTH = 1,
parameter DATA_SIZE = (DATA_WIDTH / 8),
parameter ADDR_WIDTH = 32 - `CLOG2(DATA_SIZE),
parameter REQS_BITS = `LOG2UP(NUM_REQS)
parameter DATA_SIZE = (DATA_WIDTH / 8),
parameter ADDR_WIDTH = 32 - `CLOG2(DATA_SIZE),
parameter LOG_NUM_REQS = `LOG2UP(NUM_REQS)
) (
input wire clk,
input wire reset,
input wire [REQS_BITS-1:0] request_id,
input wire [LOG_NUM_REQS-1:0] request_id,
// input requests
input wire req_valid_in,
@@ -40,7 +40,7 @@ module VX_csr_io_arb #(
if (NUM_REQS > 1) begin
for (genvar i = 0; i < NUM_REQS; i++) begin
assign req_valid_out[i] = req_valid_in && (request_id == `REQS_BITS'(i));
assign req_valid_out[i] = req_valid_in && (request_id == LOG_NUM_REQS'(i));
assign req_addr_out[i] = req_addr_in;
assign req_rw_out[i] = req_rw_in;
assign req_data_out[i] = req_data_in;
@@ -50,8 +50,6 @@ module VX_csr_io_arb #(
end else begin
`UNUSED_VAR (clk)
`UNUSED_VAR (reset)
`UNUSED_VAR (request_id)
assign req_valid_out = req_valid_in;
@@ -64,36 +62,17 @@ module VX_csr_io_arb #(
///////////////////////////////////////////////////////////////////////
// Inputs buffering
wire [NUM_REQS-1:0] rsp_valid_in_qual;
wire [NUM_REQS-1:0][DATA_WIDTH-1:0] rsp_data_in_qual;
wire [NUM_REQS-1:0] rsp_ready_in_qual;
for (genvar i = 0; i < NUM_REQS; ++i) begin
VX_skid_buffer #(
.DATAW (DATA_WIDTH),
.PASSTHRU (NUM_REQS < 4)
) rsp_buffer (
.clk (clk),
.reset (reset),
.valid_in (rsp_valid_in[i]),
.data_in (rsp_data_in[i]),
.ready_in (rsp_ready_in[i]),
.valid_out (rsp_valid_in_qual[i]),
.data_out (rsp_data_in_qual[i]),
.ready_out (rsp_ready_in_qual[i])
);
end
VX_stream_arbiter #(
.NUM_REQS(NUM_REQS),
.DATAW(DATA_WIDTH),
.BUFFERED(NUM_REQS >= 4)
.NUM_REQS (NUM_REQS),
.DATAW (DATA_WIDTH),
.IN_BUFFER (NUM_REQS >= 4),
.OUT_BUFFER (NUM_REQS >= 4)
) rsp_arb (
.clk (clk),
.reset (reset),
.valid_in (rsp_valid_in_qual),
.data_in (rsp_data_in_qual),
.ready_in (rsp_ready_in_qual),
.valid_in (rsp_valid_in),
.data_in (rsp_data_in),
.ready_in (rsp_ready_in),
.valid_out (rsp_valid_out),
.data_out (rsp_data_out),
.ready_out (rsp_ready_out)