merging perf counters

hw/rtl/interfaces/VX_perf_cache_if.v

@@ -0,0 +1,20 @@
+`ifndef VX_PERF_CACHE_IF
+`define VX_PERF_CACHE_IF
+
+`include "VX_define.vh"
+
+interface VX_perf_cache_if ();
+
+    wire [63:0] reads;
+    wire [63:0] writes;    
+    wire [63:0] read_misses;
+    wire [63:0] write_misses;
+    wire [63:0] evictions;
+    wire [63:0] mshr_stalls;
+    wire [63:0] crsp_stalls;
+    wire [63:0] dreq_stalls;
+    wire [63:0] pipe_stalls;    
+
+endinterface
+
+`endif

hw/rtl/interfaces/VX_perf_memsys_if.v

@@ -0,0 +1,17 @@
+`ifndef VX_PERF_MEMSYS_IF
+`define VX_PERF_MEMSYS_IF
+
+`include "VX_define.vh"
+
+interface VX_perf_memsys_if ();
+
+    VX_perf_cache_if dcache_if;
+    VX_perf_cache_if icache_if;
+    
+    wire [63:0] dram_latency;
+    wire [63:0] dram_requests;
+    wire [63:0] dram_responses;
+
+endinterface
+
+`endif

hw/rtl/interfaces/VX_perf_pipeline_if.v

@@ -0,0 +1,25 @@
+`ifndef VX_PERF_PIPELINE_IF
+`define VX_PERF_PIPELINE_IF
+
+`include "VX_define.vh"
+
+interface VX_perf_pipeline_if ();
+    // from pipeline
+    wire [63:0]     icache_stalls;
+    wire [63:0]     ibuffer_stalls;
+    // from issue
+    wire [63:0]     scoreboard_stalls;
+    // from execute
+    wire [63:0]     lsu_stalls;
+    wire [63:0]     csr_stalls;
+    wire [63:0]     alu_stalls;
+    wire [63:0]     gpu_stalls;
+`ifdef EXT_M_ENABLE
+    wire [63:0]     mul_stalls;
+`endif
+`ifdef EXT_F_ENABLE
+    wire [63:0]     fpu_stalls;
+`endif
+endinterface
+
+`endif