minor updates

hw/rtl/VX_lsu_unit.sv

@@ -310,7 +310,7 @@ module VX_lsu_unit #(
 
 `ifndef SYNTHESIS
     reg [`LSUQ_SIZE-1:0][(`NW_BITS + 32 + `NR_BITS + `UUID_BITS + 64 + 1)-1:0] pending_reqs;
-    wire [63:0] delay_timeout = 10000 * (1 ** (`L2_ENABLE + `L3_ENABLE));
+    wire [63:0] delay_timeout = 40000 * (1 ** (`L2_ENABLE + `L3_ENABLE));
 
     always @(posedge clk) begin
         if (reset) begin

hw/rtl/cache/VX_nc_bypass.sv

@@ -100,7 +100,6 @@ module VX_nc_bypass #(
     localparam CORE_LDATAW = $clog2(CORE_DATA_WIDTH);
     localparam MEM_LDATAW  = $clog2(MEM_DATA_WIDTH);
     localparam D = MEM_LDATAW - CORE_LDATAW;
-    localparam P = 2**D;
 
     // core request handling
 

hw/rtl/libs/VX_popcount.sv

@@ -9,6 +9,8 @@ module VX_popcount #(
     input  wire [N-1:0] in_i,
     output wire [M-1:0] cnt_o
 );
+    `UNUSED_PARAM (MODEL)
+
 `ifndef SYNTHESIS
     assign cnt_o = $countones(in_i);
 `else