Vortex 2.0 changes:
+ Microarchitecture optimizations + 64-bit support + Xilinx FPGA support + LLVM-16 support + Refactoring and quality control fixes
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@@ -1,3 +1,16 @@
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// Copyright © 2019-2023
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#pragma once
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#include "pipeline.h"
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@@ -6,20 +19,15 @@
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namespace vortex {
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class Scoreboard {
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private:
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public:
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struct reg_use_t {
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RegType type;
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uint32_t reg;
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uint64_t owner;
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};
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std::vector<RegMask> in_use_iregs_;
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std::vector<RegMask> in_use_fregs_;
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std::vector<RegMask> in_use_vregs_;
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std::unordered_map<uint32_t, uint64_t> owners_;
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public:
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Scoreboard(const ArchDef &arch)
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Scoreboard(const Arch &arch)
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: in_use_iregs_(arch.num_warps())
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, in_use_fregs_(arch.num_warps())
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, in_use_vregs_(arch.num_warps())
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@@ -84,8 +92,7 @@ public:
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}
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void reserve(pipeline_trace_t* state) {
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if (!state->wb)
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return;
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assert(state->wb);
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switch (state->rdest_type) {
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case RegType::Integer:
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in_use_iregs_.at(state->wid).set(state->rdest);
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@@ -105,8 +112,7 @@ public:
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}
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void release(pipeline_trace_t* state) {
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if (!state->wb)
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return;
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assert(state->wb);
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switch (state->rdest_type) {
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case RegType::Integer:
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in_use_iregs_.at(state->wid).reset(state->rdest);
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@@ -123,6 +129,13 @@ public:
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uint32_t tag = (state->rdest << 16) | (state->wid << 4) | (int)state->rdest_type;
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owners_.erase(tag);
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}
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private:
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std::vector<RegMask> in_use_iregs_;
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std::vector<RegMask> in_use_fregs_;
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std::vector<RegMask> in_use_vregs_;
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std::unordered_map<uint32_t, uint64_t> owners_;
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};
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}
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