Vortex 2.0 changes:
+ Microarchitecture optimizations + 64-bit support + Xilinx FPGA support + LLVM-16 support + Refactoring and quality control fixes
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@@ -1,3 +1,16 @@
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// Copyright © 2019-2023
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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`timescale 1ns/1ps
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module VX_tb_divide();
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@@ -17,7 +30,7 @@ module VX_tb_divide();
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wire [31:0] o_div[0:7], o_rem[0:7];
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for (genvar i = 0; i < 8; i++) begin
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for (genvar i = 0; i < 8; ++i) begin
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VX_divide#(
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.WIDTHN(32),
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.WIDTHD(32),
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