Vortex 2.0 changes:
+ Microarchitecture optimizations + 64-bit support + Xilinx FPGA support + LLVM-16 support + Refactoring and quality control fixes
This commit is contained in:
Blaise Tine
1
hw/syn/xilinx/xrt/.gitignore
vendored
Normal file
1
hw/syn/xilinx/xrt/.gitignore
vendored
Normal file
@@ -0,0 +1 @@
|
||||
/build*/*
|
||||
200
hw/syn/xilinx/xrt/Makefile
Normal file
200
hw/syn/xilinx/xrt/Makefile
Normal file
@@ -0,0 +1,200 @@
|
||||
ifneq ($(findstring Makefile, $(MAKEFILE_LIST)), Makefile)
|
||||
help:
|
||||
$(ECHO) "Makefile Usage:"
|
||||
$(ECHO) " make all TARGET=<sw_emu/hw_emu/hw> PLATFORM=<FPGA platform>"
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||||
$(ECHO) " Command to generate the design for specified Target and Device."
|
||||
$(ECHO) ""
|
||||
$(ECHO) " make clean"
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||||
$(ECHO) " Command to remove the generated non-hardware files."
|
||||
$(ECHO) ""
|
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endif
|
||||
|
||||
TARGET ?= hw
|
||||
PLATFORM ?=
|
||||
XLEN ?= 32
|
||||
NUM_CORES ?= 1
|
||||
PREFIX ?= build$(XLEN)
|
||||
MAX_JOBS ?= 8
|
||||
|
||||
RTL_DIR = ../../../../rtl
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AFU_DIR = $(RTL_DIR)/afu/xrt
|
||||
DPI_DIR = ../../../../dpi
|
||||
SCRIPT_DIR = ../../../../scripts
|
||||
THIRD_PARTY_DIR = ../../../../../third_party
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||||
|
||||
VIVADO = $(XILINX_VIVADO)/bin/vivado
|
||||
VPP = $(XILINX_VITIS)/bin/v++
|
||||
CP = cp -rf
|
||||
RMDIR = rm -rf
|
||||
ECHO = @echo
|
||||
|
||||
NCPUS := $(shell grep -c ^processor /proc/cpuinfo)
|
||||
JOBS ?= $(shell echo $$(( $(NCPUS) > $(MAX_JOBS) ? $(MAX_JOBS) : $(NCPUS) )))
|
||||
|
||||
PLATFORM_TO_XSA = $(strip $(patsubst %.xpfm, % , $(shell basename $(PLATFORM))))
|
||||
XSA := $(call PLATFORM_TO_XSA, $(PLATFORM))
|
||||
|
||||
DEV_ARCH := $(shell platforminfo -p $(PLATFORM) | grep 'FPGA Family' | sed 's/.*://' | sed '/ai_engine/d' | sed 's/^[[:space:]]*//')
|
||||
CPU_TYPE := $(shell platforminfo -p $(PLATFORM) | grep 'CPU Type' | sed 's/.*://' | sed '/ai_engine/d' | sed 's/^[[:space:]]*//')
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||||
|
||||
BUILD_DIR = $(PREFIX)_$(XSA)_$(TARGET)
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BIN_DIR = $(BUILD_DIR)/bin
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||||
|
||||
XO_CONTAINER = $(BIN_DIR)/vortex_afu.xo
|
||||
XCLBIN_CONTAINER = $(BIN_DIR)/vortex_afu.xclbin
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||||
|
||||
# Control RTL debug tracing states
|
||||
DBG_TRACE_FLAGS += -DDBG_TRACE_CORE_PIPELINE
|
||||
DBG_TRACE_FLAGS += -DDBG_TRACE_CORE_ICACHE
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DBG_TRACE_FLAGS += -DDBG_TRACE_CORE_DCACHE
|
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DBG_TRACE_FLAGS += -DDBG_TRACE_CORE_MEM
|
||||
DBG_TRACE_FLAGS += -DDBG_TRACE_CACHE_BANK
|
||||
DBG_TRACE_FLAGS += -DDBG_TRACE_CACHE_MSHR
|
||||
DBG_TRACE_FLAGS += -DDBG_TRACE_CACHE_TAG
|
||||
DBG_TRACE_FLAGS += -DDBG_TRACE_CACHE_DATA
|
||||
DBG_TRACE_FLAGS += -DDBG_TRACE_AFU
|
||||
DBG_TRACE_FLAGS += -DDBG_TRACE_TEX
|
||||
DBG_TRACE_FLAGS += -DDBG_TRACE_RASTER
|
||||
DBG_TRACE_FLAGS += -DDBG_TRACE_ROP
|
||||
DBG_TRACE_FLAGS += -DDBG_TRACE_GBAR
|
||||
|
||||
# Control logic analyzer monitors
|
||||
DBG_SCOPE_FLAGS += -DDBG_SCOPE_AFU
|
||||
DBG_SCOPE_FLAGS += -DDBG_SCOPE_ISSUE
|
||||
DBG_SCOPE_FLAGS += -DDBG_SCOPE_FETCH
|
||||
DBG_SCOPE_FLAGS += -DDBG_SCOPE_LSU
|
||||
DBG_SCOPE_FLAGS += -DDBG_SCOPE_RASTER
|
||||
DBG_SCOPE_FLAGS += -DDBG_SCOPE_MSCHED
|
||||
|
||||
# cluster configuration
|
||||
CONFIGS_1c := -DNUM_CLUSTERS=1 -DNUM_CORES=1
|
||||
CONFIGS_2c := -DNUM_CLUSTERS=1 -DNUM_CORES=2
|
||||
CONFIGS_4c := -DNUM_CLUSTERS=1 -DNUM_CORES=4
|
||||
CONFIGS_8c := -DNUM_CLUSTERS=1 -DNUM_CORES=8
|
||||
CONFIGS_16c := -DNUM_CLUSTERS=1 -DNUM_CORES=16 -DL2_ENABLE
|
||||
CONFIGS_32c := -DNUM_CLUSTERS=2 -DNUM_CORES=16 -DL2_ENABLE
|
||||
CONFIGS_64c := -DNUM_CLUSTERS=4 -DNUM_CORES=16 -DL2_ENABLE
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||||
CONFIGS += $(CONFIGS_$(NUM_CORES)c)
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||||
|
||||
# include paths
|
||||
FPU_INCLUDE = -I$(RTL_DIR)/fpu
|
||||
ifneq (,$(findstring FPU_FPNEW,$(CONFIGS)))
|
||||
FPU_INCLUDE += -I$(THIRD_PARTY_DIR)/fpnew/src/common_cells/include -I$(THIRD_PARTY_DIR)/fpnew/src/common_cells/src -I$(THIRD_PARTY_DIR)/fpnew/src/fpu_div_sqrt_mvp/hdl -I$(THIRD_PARTY_DIR)/fpnew/src
|
||||
endif
|
||||
RTL_INCLUDE = -I$(RTL_DIR) -I$(RTL_DIR)/libs -I$(RTL_DIR)/interfaces -I$(RTL_DIR)/core -I$(RTL_DIR)/mem -I$(RTL_DIR)/cache -I$(AFU_DIR)
|
||||
RTL_INCLUDE += $(FPU_INCLUDE)
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||||
|
||||
# Kernel compiler global settings
|
||||
VPP_FLAGS += --link --target $(TARGET) --platform $(PLATFORM) --save-temps --no_ip_cache
|
||||
VPP_FLAGS += --vivado.synth.jobs $(JOBS) --vivado.impl.jobs $(JOBS)
|
||||
|
||||
ifeq ($(DEV_ARCH), zynquplus)
|
||||
# ztnq
|
||||
else ifeq ($(DEV_ARCH), versal)
|
||||
# versal
|
||||
else
|
||||
# alveo
|
||||
VPP_FLAGS += --connectivity.sp vortex_afu_1.m_axi_mem_0:HBM[0:15]
|
||||
endif
|
||||
|
||||
VPP_FLAGS += --report_level 2
|
||||
VPP_FLAGS += --config ../vitis.ini
|
||||
|
||||
# Enable perf counters
|
||||
ifdef PERF
|
||||
CFLAGS += -DPERF_ENABLE
|
||||
endif
|
||||
|
||||
# Generates profile summary report
|
||||
ifdef PROFILE
|
||||
VPP_FLAGS += --profile_kernel data:all:all:all
|
||||
VPP_FLAGS += --profile_kernel stall:all:all:all
|
||||
endif
|
||||
|
||||
ifeq ($(TARGET), hw_emu)
|
||||
CFLAGS += -DSIMULATION
|
||||
endif
|
||||
|
||||
# Debugigng
|
||||
ifdef DEBUG
|
||||
VPP_FLAGS += -g --debug.protocol all
|
||||
ifeq ($(TARGET), hw)
|
||||
CFLAGS += -DNDEBUG -DSCOPE $(DBG_SCOPE_FLAGS)
|
||||
SCOPE_JSON += $(BUILD_DIR)/scope.json
|
||||
#CFLAGS += -DNDEBUG -DCHIPSCOPE $(DBG_SCOPE_FLAGS)
|
||||
#VPP_FLAGS += --debug.chipscope vortex_afu_1
|
||||
else
|
||||
VPP_FLAGS += --vivado.prop fileset.sim_1.xsim.elaborate.debug_level=all
|
||||
CFLAGS += $(DBG_TRACE_FLAGS)
|
||||
endif
|
||||
else
|
||||
VPP_FLAGS += --optimize 3
|
||||
CFLAGS += -DNDEBUG
|
||||
endif
|
||||
|
||||
# compilation flags
|
||||
CFLAGS += -DSYNTHESIS -DVIVADO
|
||||
CFLAGS += -DXLEN_$(XLEN)
|
||||
CFLAGS += $(CONFIGS)
|
||||
CFLAGS += $(RTL_INCLUDE)
|
||||
|
||||
# ast dump flags
|
||||
XML_CFLAGS = $(filter-out -DSYNTHESIS -DVIVADO, $(CFLAGS)) -I$(DPI_DIR)
|
||||
|
||||
# RTL Kernel only supports Hardware and Hardware Emulation.
|
||||
ifneq ($(TARGET),$(findstring $(TARGET), hw hw_emu))
|
||||
$(warning WARNING:Application supports only hw hw_emu TARGET. Please use the target for running the application)
|
||||
endif
|
||||
|
||||
.PHONY: all clean gen-sources gen-ast emconfig check-devices
|
||||
|
||||
all: check-devices emconfig $(XCLBIN_CONTAINER) report
|
||||
|
||||
gen-sources: $(BUILD_DIR)/sources.txt
|
||||
$(BUILD_DIR)/sources.txt:
|
||||
mkdir -p $(BUILD_DIR); cd $(BUILD_DIR); $(SCRIPT_DIR)/gen_sources.sh -P $(CFLAGS) -Csrc -Osources.txt
|
||||
|
||||
gen-ast: $(BUILD_DIR)/vortex.xml
|
||||
$(BUILD_DIR)/vortex.xml:
|
||||
mkdir -p $(BUILD_DIR); cd $(BUILD_DIR); verilator --xml-only -O0 $(XML_CFLAGS) vortex_afu.v --xml-output vortex.xml
|
||||
|
||||
scope-json: $(BUILD_DIR)/scope.json
|
||||
$(BUILD_DIR)/scope.json: $(BUILD_DIR)/vortex.xml
|
||||
mkdir -p $(BUILD_DIR); cd $(BUILD_DIR); $(SCRIPT_DIR)/scope.py vortex.xml -o scope.json
|
||||
|
||||
gen-xo: $(XO_CONTAINER)
|
||||
$(XO_CONTAINER): $(BUILD_DIR)/sources.txt
|
||||
mkdir -p $(BUILD_DIR); cd $(BUILD_DIR); $(VIVADO) -mode batch -source ../scripts/gen_xo.tcl -tclargs ../$(XO_CONTAINER) vortex_afu sources.txt $(SCRIPT_DIR) ../$(BUILD_DIR)
|
||||
|
||||
gen-bin: $(XCLBIN_CONTAINER)
|
||||
$(XCLBIN_CONTAINER): $(XO_CONTAINER) $(SCOPE_JSON)
|
||||
mkdir -p $(BIN_DIR); cd $(BUILD_DIR); $(VPP) $(VPP_FLAGS) -o ../$(XCLBIN_CONTAINER) ../$(XO_CONTAINER)
|
||||
|
||||
emconfig: $(BIN_DIR)/emconfig.json
|
||||
$(BIN_DIR)/emconfig.json:
|
||||
mkdir -p $(BIN_DIR); cd $(BUILD_DIR); emconfigutil --platform $(PLATFORM) --od ../$(BIN_DIR)
|
||||
|
||||
report: $(XCLBIN_CONTAINER)
|
||||
ifeq ($(TARGET),$(findstring $(TARGET), hw))
|
||||
cp $(BUILD_DIR)/_x/logs/link/syn/ulp_vortex_afu_1_0_synth_1_runme.log $(BUILD_DIR)/bin/runme.log
|
||||
cp $(BUILD_DIR)/_x/reports/link/imp/impl_1_full_util_routed.rpt $(BUILD_DIR)/bin/synthesis.log
|
||||
cp $(BUILD_DIR)/_x/reports/link/imp/impl_1_hw_bb_locked_timing_summary_routed.rpt $(BUILD_DIR)/bin/timing.log
|
||||
endif
|
||||
|
||||
hwserver:
|
||||
debug_hw --xvc_pcie /dev/xfpga/xvc_pub.u2305.0 --hw_server &
|
||||
|
||||
chipscope:
|
||||
debug_hw --vivado --host localhost --ltx_file $(BUILD_DIR)/_x/link/vivado/vpl/prj/prj.runs/impl_1/debug_nets.ltx &
|
||||
|
||||
clean:
|
||||
$(RMDIR) $(BUILD_DIR)
|
||||
|
||||
# Check the devices avaiable
|
||||
check-devices:
|
||||
ifndef PLATFORM
|
||||
$(error PLATFORM not set. Please set the PLATFORM properly and rerun. Run "make help" for more details.)
|
||||
endif
|
||||
ifndef XILINX_VITIS
|
||||
$(error XILINX_VITIS variable is not set, please set correctly and rerun)
|
||||
endif
|
||||
25
hw/syn/xilinx/xrt/kill_build.sh
Executable file
25
hw/syn/xilinx/xrt/kill_build.sh
Executable file
@@ -0,0 +1,25 @@
|
||||
#!/bin/sh
|
||||
|
||||
# Copyright © 2019-2023
|
||||
#
|
||||
# Licensed under the Apache License, Version 2.0 (the "License");
|
||||
# you may not use this file except in compliance with the License.
|
||||
# You may obtain a copy of the License at
|
||||
# http://www.apache.org/licenses/LICENSE-2.0
|
||||
#
|
||||
# Unless required by applicable law or agreed to in writing, software
|
||||
# distributed under the License is distributed on an "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
# See the License for the specific language governing permissions and
|
||||
# limitations under the License.
|
||||
|
||||
ps -A | grep xrcserver | awk '{print $1}' | xargs kill -9 $1
|
||||
ps -A | grep loader | awk '{print $1}' | xargs kill -9 $1
|
||||
ps -A | grep vpl | awk '{print $1}' | xargs kill -9 $1
|
||||
ps -A | grep v++ | awk '{print $1}' | xargs kill -9 $1
|
||||
ps -A | grep vivado | awk '{print $1}' | xargs kill -9 $1
|
||||
ps -A | grep runme.sh | awk '{print $1}' | xargs kill -9 $1
|
||||
ps -A | grep ISEWrap.sh | awk '{print $1}' | xargs kill -9 $1
|
||||
ps -A | grep vrs | awk '{print $1}' | xargs kill -9 $1
|
||||
ps -A | grep xcd | awk '{print $1}' | xargs kill -9 $1
|
||||
ps -A | grep make | awk '{print $1}' | xargs kill -9 $1
|
||||
19
hw/syn/xilinx/xrt/kill_hwserver.sh
Executable file
19
hw/syn/xilinx/xrt/kill_hwserver.sh
Executable file
@@ -0,0 +1,19 @@
|
||||
#!/bin/bash
|
||||
|
||||
# Copyright © 2019-2023
|
||||
#
|
||||
# Licensed under the Apache License, Version 2.0 (the "License");
|
||||
# you may not use this file except in compliance with the License.
|
||||
# You may obtain a copy of the License at
|
||||
# http://www.apache.org/licenses/LICENSE-2.0
|
||||
#
|
||||
# Unless required by applicable law or agreed to in writing, software
|
||||
# distributed under the License is distributed on an "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
# See the License for the specific language governing permissions and
|
||||
# limitations under the License.
|
||||
|
||||
ps -A | grep debug_hw | awk '{print $1}' | xargs kill -9 $1
|
||||
ps -A | grep python3 | awk '{print $1}' | xargs kill -9 $1
|
||||
ps -A | grep xvc_pcie | awk '{print $1}' | xargs kill -9 $1
|
||||
ps -A | grep hw_server | awk '{print $1}' | xargs kill -9 $1
|
||||
19
hw/syn/xilinx/xrt/kill_sim.sh
Executable file
19
hw/syn/xilinx/xrt/kill_sim.sh
Executable file
@@ -0,0 +1,19 @@
|
||||
#!/bin/sh
|
||||
|
||||
# Copyright © 2019-2023
|
||||
#
|
||||
# Licensed under the Apache License, Version 2.0 (the "License");
|
||||
# you may not use this file except in compliance with the License.
|
||||
# You may obtain a copy of the License at
|
||||
# http://www.apache.org/licenses/LICENSE-2.0
|
||||
#
|
||||
# Unless required by applicable law or agreed to in writing, software
|
||||
# distributed under the License is distributed on an "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
# See the License for the specific language governing permissions and
|
||||
# limitations under the License.
|
||||
|
||||
ps -A | grep launch_hw_emu.s | awk '{print $1}' | xargs kill -9 $1
|
||||
ps -A | grep simulate.sh | awk '{print $1}' | xargs kill -9 $1
|
||||
ps -A | grep xsim | awk '{print $1}' | xargs kill -9 $1
|
||||
ps -A | grep xsimk | awk '{print $1}' | xargs kill -9 $1
|
||||
40
hw/syn/xilinx/xrt/scripts/gen_ip.tcl
Normal file
40
hw/syn/xilinx/xrt/scripts/gen_ip.tcl
Normal file
@@ -0,0 +1,40 @@
|
||||
# Copyright © 2019-2023
|
||||
#
|
||||
# Licensed under the Apache License, Version 2.0 (the "License");
|
||||
# you may not use this file except in compliance with the License.
|
||||
# You may obtain a copy of the License at
|
||||
# http://www.apache.org/licenses/LICENSE-2.0
|
||||
#
|
||||
# Unless required by applicable law or agreed to in writing, software
|
||||
# distributed under the License is distributed on an "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
# See the License for the specific language governing permissions and
|
||||
# limitations under the License.
|
||||
|
||||
if { $::argc != 1 } {
|
||||
puts "ERROR: Program \"$::argv0\" requires 1 arguments!\n"
|
||||
puts "Usage: $::argv0 <ip_dir>\n"
|
||||
exit
|
||||
}
|
||||
|
||||
set ip_dir [lindex $::argv 0]
|
||||
|
||||
# IP folder does not exist. Create IP folder
|
||||
file mkdir ${ip_dir}
|
||||
|
||||
# create_ip requires that a project is open in memory.
|
||||
# Create project but don't do anything with it
|
||||
create_project -in_memory
|
||||
|
||||
create_ip -name floating_point -vendor xilinx.com -library ip -version 7.1 -module_name xil_fdiv -dir ${ip_dir}
|
||||
set_property -dict [list CONFIG.Component_Name {xil_fdiv} CONFIG.Operation_Type {Divide} CONFIG.Flow_Control {NonBlocking} CONFIG.Has_ACLKEN {true} CONFIG.C_Has_UNDERFLOW {true} CONFIG.C_Has_OVERFLOW {true} CONFIG.C_Has_INVALID_OP {true} CONFIG.C_Has_DIVIDE_BY_ZERO {true} CONFIG.A_Precision_Type {Single} CONFIG.C_A_Exponent_Width {8} CONFIG.C_A_Fraction_Width {24} CONFIG.Result_Precision_Type {Single} CONFIG.C_Result_Exponent_Width {8} CONFIG.C_Result_Fraction_Width {24} CONFIG.C_Mult_Usage {No_Usage} CONFIG.Has_RESULT_TREADY {false} CONFIG.C_Latency {28} CONFIG.C_Rate {1}] [get_ips xil_fdiv]
|
||||
|
||||
create_ip -name floating_point -vendor xilinx.com -library ip -version 7.1 -module_name xil_fsqrt -dir ${ip_dir}
|
||||
set_property -dict [list CONFIG.Component_Name {xil_fsqrt} CONFIG.Operation_Type {Square_root} CONFIG.Flow_Control {NonBlocking} CONFIG.Has_ACLKEN {true} CONFIG.C_Has_INVALID_OP {true} CONFIG.A_Precision_Type {Single} CONFIG.C_A_Exponent_Width {8} CONFIG.C_A_Fraction_Width {24} CONFIG.Result_Precision_Type {Single} CONFIG.C_Result_Exponent_Width {8} CONFIG.C_Result_Fraction_Width {24} CONFIG.C_Mult_Usage {No_Usage} CONFIG.Has_RESULT_TREADY {false} CONFIG.C_Latency {28} CONFIG.C_Rate {1}] [get_ips xil_fsqrt]
|
||||
|
||||
create_ip -name floating_point -vendor xilinx.com -library ip -version 7.1 -module_name xil_fma -dir ${ip_dir}
|
||||
set_property -dict [list CONFIG.Component_Name {xil_fma} CONFIG.Operation_Type {FMA} CONFIG.Add_Sub_Value {Add} CONFIG.Flow_Control {NonBlocking} CONFIG.Has_ACLKEN {true} CONFIG.C_Has_UNDERFLOW {true} CONFIG.C_Has_OVERFLOW {true} CONFIG.C_Has_INVALID_OP {true} CONFIG.Has_A_TUSER {false} CONFIG.A_Precision_Type {Single} CONFIG.C_A_Exponent_Width {8} CONFIG.C_A_Fraction_Width {24} CONFIG.Result_Precision_Type {Single} CONFIG.C_Result_Exponent_Width {8} CONFIG.C_Result_Fraction_Width {24} CONFIG.C_Mult_Usage {Medium_Usage} CONFIG.Has_RESULT_TREADY {false} CONFIG.C_Latency {16} CONFIG.C_Rate {1} CONFIG.A_TUSER_Width {1}] [get_ips xil_fma]
|
||||
|
||||
generate_target all [get_ips]
|
||||
|
||||
close_project -delete
|
||||
40
hw/syn/xilinx/xrt/scripts/gen_xo.tcl
Normal file
40
hw/syn/xilinx/xrt/scripts/gen_xo.tcl
Normal file
@@ -0,0 +1,40 @@
|
||||
# Copyright © 2019-2023
|
||||
#
|
||||
# Licensed under the Apache License, Version 2.0 (the "License");
|
||||
# you may not use this file except in compliance with the License.
|
||||
# You may obtain a copy of the License at
|
||||
# http://www.apache.org/licenses/LICENSE-2.0
|
||||
#
|
||||
# Unless required by applicable law or agreed to in writing, software
|
||||
# distributed under the License is distributed on an "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
# See the License for the specific language governing permissions and
|
||||
# limitations under the License.
|
||||
|
||||
if { $::argc != 5 } {
|
||||
puts "ERROR: Program \"$::argv0\" requires 4 arguments!\n"
|
||||
puts "Usage: $::argv0 <xoname> <krnl_name> <vcs_file> <tool_dir> <build_dir>\n"
|
||||
exit
|
||||
}
|
||||
|
||||
set xoname [lindex $::argv 0]
|
||||
set krnl_name [lindex $::argv 1]
|
||||
set vcs_file [lindex $::argv 2]
|
||||
set tool_dir [lindex $::argv 3]
|
||||
set build_dir [lindex $::argv 4]
|
||||
|
||||
set script_path [ file dirname [ file normalize [ info script ] ] ]
|
||||
|
||||
if {[file exists "${xoname}"]} {
|
||||
file delete -force "${xoname}"
|
||||
}
|
||||
|
||||
set argv [list ${build_dir}/ip]
|
||||
set argc 1
|
||||
source ${script_path}/gen_ip.tcl
|
||||
|
||||
set argv [list ${krnl_name} ${vcs_file} ${tool_dir} ${build_dir}]
|
||||
set argc 4
|
||||
source ${script_path}/package_kernel.tcl
|
||||
|
||||
package_xo -xo_path ${xoname} -kernel_name ${krnl_name} -ip_directory "${build_dir}/xo/packaged_kernel"
|
||||
268
hw/syn/xilinx/xrt/scripts/package_kernel.tcl
Normal file
268
hw/syn/xilinx/xrt/scripts/package_kernel.tcl
Normal file
@@ -0,0 +1,268 @@
|
||||
# Copyright © 2019-2023
|
||||
#
|
||||
# Licensed under the Apache License, Version 2.0 (the "License");
|
||||
# you may not use this file except in compliance with the License.
|
||||
# You may obtain a copy of the License at
|
||||
# http://www.apache.org/licenses/LICENSE-2.0
|
||||
#
|
||||
# Unless required by applicable law or agreed to in writing, software
|
||||
# distributed under the License is distributed on an "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
# See the License for the specific language governing permissions and
|
||||
# limitations under the License.
|
||||
|
||||
if { $::argc != 4 } {
|
||||
puts "ERROR: Program \"$::argv0\" requires 4 arguments!\n"
|
||||
puts "Usage: $::argv0 <krnl_name> <vcs_file> <tool_dir> <build_dir>\n"
|
||||
exit
|
||||
}
|
||||
|
||||
set krnl_name [lindex $::argv 0]
|
||||
set vcs_file [lindex $::argv 1]
|
||||
set tool_dir [lindex $::argv 2]
|
||||
set build_dir [lindex $::argv 3]
|
||||
|
||||
set path_to_packaged "${build_dir}/xo/packaged_kernel"
|
||||
set path_to_tmp_project "${build_dir}/xo/project"
|
||||
|
||||
source "${tool_dir}/parse_vcs_list.tcl"
|
||||
set vlist [parse_vcs_list "${vcs_file}"]
|
||||
|
||||
set vsources_list [lindex $vlist 0]
|
||||
set vincludes_list [lindex $vlist 1]
|
||||
set vdefines_list [lindex $vlist 2]
|
||||
|
||||
#puts ${vsources_list}
|
||||
#puts ${vincludes_list}
|
||||
#puts ${vdefines_list}
|
||||
|
||||
# find if chipscope is enabled
|
||||
set chipscope 0
|
||||
foreach def $vdefines_list {
|
||||
set fields [split $def "="]
|
||||
set name [lindex $fields 0]
|
||||
if { $name == "CHIPSCOPE" } {
|
||||
set chipscope 1
|
||||
}
|
||||
}
|
||||
|
||||
create_project -force kernel_pack $path_to_tmp_project
|
||||
|
||||
add_files -norecurse ${vsources_list}
|
||||
|
||||
set obj [get_filesets sources_1]
|
||||
set files [list \
|
||||
[file normalize "${build_dir}/ip/xil_fdiv/xil_fdiv.xci"] \
|
||||
[file normalize "${build_dir}/ip/xil_fma/xil_fma.xci"] \
|
||||
[file normalize "${build_dir}/ip/xil_fsqrt/xil_fsqrt.xci"] \
|
||||
]
|
||||
add_files -verbose -norecurse -fileset $obj $files
|
||||
|
||||
set_property include_dirs ${vincludes_list} [current_fileset]
|
||||
#set_property verilog_define ${vdefines_list} [current_fileset]
|
||||
|
||||
set obj [get_filesets sources_1]
|
||||
set_property -verbose -name "top" -value ${krnl_name} -objects $obj
|
||||
|
||||
if { $chipscope == 1 } {
|
||||
# hw debugging
|
||||
create_ip -name axis_ila -vendor xilinx.com -library ip -version 1.1 -module_name ila_afu
|
||||
set_property -dict [list CONFIG.C_ADV_TRIGGER {true} \
|
||||
CONFIG.C_EN_STRG_QUAL {1} \
|
||||
CONFIG.C_DATA_DEPTH {4096} \
|
||||
CONFIG.C_NUM_OF_PROBES {2} \
|
||||
CONFIG.C_PROBE0_WIDTH {8} \
|
||||
CONFIG.C_PROBE1_WIDTH {24} \
|
||||
] [get_ips ila_afu]
|
||||
generate_target {instantiation_template} [get_files ila_afu.xci]
|
||||
set_property generate_synth_checkpoint false [get_files ila_afu.xci]
|
||||
|
||||
create_ip -name axis_ila -vendor xilinx.com -library ip -version 1.1 -module_name ila_fetch
|
||||
set_property -dict [list CONFIG.C_ADV_TRIGGER {true} \
|
||||
CONFIG.C_EN_STRG_QUAL {1} \
|
||||
CONFIG.C_DATA_DEPTH {4096} \
|
||||
CONFIG.C_NUM_OF_PROBES {3} \
|
||||
CONFIG.C_PROBE0_WIDTH {128} \
|
||||
CONFIG.C_PROBE1_WIDTH {128} \
|
||||
CONFIG.C_PROBE2_WIDTH {128} \
|
||||
] [get_ips ila_fetch]
|
||||
generate_target {instantiation_template} [get_files ila_fetch.xci]
|
||||
set_property generate_synth_checkpoint false [get_files ila_fetch.xci]
|
||||
|
||||
create_ip -name axis_ila -vendor xilinx.com -library ip -version 1.1 -module_name ila_issue
|
||||
set_property -dict [list CONFIG.C_ADV_TRIGGER {true} \
|
||||
CONFIG.C_EN_STRG_QUAL {1} \
|
||||
CONFIG.C_DATA_DEPTH {4096} \
|
||||
CONFIG.C_NUM_OF_PROBES {2} \
|
||||
CONFIG.C_PROBE0_WIDTH {256} \
|
||||
CONFIG.C_PROBE1_WIDTH {128} \
|
||||
] [get_ips ila_issue]
|
||||
generate_target {instantiation_template} [get_files ila_issue.xci]
|
||||
set_property generate_synth_checkpoint false [get_files ila_issue.xci]
|
||||
|
||||
create_ip -name axis_ila -vendor xilinx.com -library ip -version 1.1 -module_name ila_lsu
|
||||
set_property -dict [list CONFIG.C_ADV_TRIGGER {true} \
|
||||
CONFIG.C_EN_STRG_QUAL {1} \
|
||||
CONFIG.C_DATA_DEPTH {4096} \
|
||||
CONFIG.C_NUM_OF_PROBES {4} \
|
||||
CONFIG.C_PROBE0_WIDTH {256} \
|
||||
CONFIG.C_PROBE1_WIDTH {128} \
|
||||
CONFIG.C_PROBE2_WIDTH {288} \
|
||||
CONFIG.C_PROBE3_WIDTH {256} \
|
||||
] [get_ips ila_lsu]
|
||||
generate_target {instantiation_template} [get_files ila_lsu.xci]
|
||||
set_property generate_synth_checkpoint false [get_files ila_lsu.xci]
|
||||
|
||||
create_ip -name axis_ila -vendor xilinx.com -library ip -version 1.1 -module_name ila_msched
|
||||
set_property -dict [list CONFIG.C_ADV_TRIGGER {true} \
|
||||
CONFIG.C_EN_STRG_QUAL {1} \
|
||||
CONFIG.C_DATA_DEPTH {4096} \
|
||||
CONFIG.C_NUM_OF_PROBES {4} \
|
||||
CONFIG.C_PROBE0_WIDTH {128} \
|
||||
CONFIG.C_PROBE1_WIDTH {128} \
|
||||
CONFIG.C_PROBE2_WIDTH {128} \
|
||||
CONFIG.C_PROBE3_WIDTH {128} \
|
||||
] [get_ips ila_msched]
|
||||
generate_target {instantiation_template} [get_files ila_msched.xci]
|
||||
set_property generate_synth_checkpoint false [get_files ila_msched.xci]
|
||||
|
||||
create_ip -name axis_ila -vendor xilinx.com -library ip -version 1.1 -module_name ila_raster
|
||||
set_property -dict [list CONFIG.C_ADV_TRIGGER {true} \
|
||||
CONFIG.C_EN_STRG_QUAL {1} \
|
||||
CONFIG.C_DATA_DEPTH {4096} \
|
||||
CONFIG.C_NUM_OF_PROBES {2} \
|
||||
CONFIG.C_PROBE0_WIDTH {128} \
|
||||
CONFIG.C_PROBE1_WIDTH {128} \
|
||||
] [get_ips ila_raster]
|
||||
generate_target {instantiation_template} [get_files ila_raster.xci]
|
||||
set_property generate_synth_checkpoint false [get_files ila_raster.xci]
|
||||
}
|
||||
|
||||
update_compile_order -fileset sources_1
|
||||
update_compile_order -fileset sim_1
|
||||
ipx::package_project -root_dir $path_to_packaged -vendor xilinx.com -library RTLKernel -taxonomy /KernelIP -import_files -set_current false
|
||||
ipx::unload_core $path_to_packaged/component.xml
|
||||
ipx::edit_ip_in_project -upgrade true -name tmp_edit_project -directory $path_to_packaged $path_to_packaged/component.xml
|
||||
|
||||
set core [ipx::current_core]
|
||||
|
||||
set_property core_revision 2 $core
|
||||
foreach up [ipx::get_user_parameters] {
|
||||
ipx::remove_user_parameter [get_property NAME $up] $core
|
||||
}
|
||||
|
||||
ipx::associate_bus_interfaces -busif s_axi_ctrl -clock ap_clk $core
|
||||
|
||||
for {set i 0} {$i < 1} {incr i} {
|
||||
ipx::associate_bus_interfaces -busif m_axi_mem_$i -clock ap_clk $core
|
||||
}
|
||||
|
||||
set mem_map [::ipx::add_memory_map -quiet "s_axi_ctrl" $core]
|
||||
set addr_block [::ipx::add_address_block -quiet "reg0" $mem_map]
|
||||
|
||||
set reg [::ipx::add_register "CTRL" $addr_block]
|
||||
set_property description "Control signals" $reg
|
||||
set_property address_offset 0x000 $reg
|
||||
set_property size 32 $reg
|
||||
|
||||
set field [ipx::add_field AP_START $reg]
|
||||
set_property ACCESS {read-write} $field
|
||||
set_property BIT_OFFSET {0} $field
|
||||
set_property BIT_WIDTH {1} $field
|
||||
set_property DESCRIPTION {Control signal Register for 'ap_start'.} $field
|
||||
set_property MODIFIED_WRITE_VALUE {modify} $field
|
||||
|
||||
set field [ipx::add_field AP_DONE $reg]
|
||||
set_property ACCESS {read-only} $field
|
||||
set_property BIT_OFFSET {1} $field
|
||||
set_property BIT_WIDTH {1} $field
|
||||
set_property DESCRIPTION {Control signal Register for 'ap_done'.} $field
|
||||
set_property READ_ACTION {modify} $field
|
||||
|
||||
set field [ipx::add_field AP_IDLE $reg]
|
||||
set_property ACCESS {read-only} $field
|
||||
set_property BIT_OFFSET {2} $field
|
||||
set_property BIT_WIDTH {1} $field
|
||||
set_property DESCRIPTION {Control signal Register for 'ap_idle'.} $field
|
||||
set_property READ_ACTION {modify} $field
|
||||
|
||||
set field [ipx::add_field AP_READY $reg]
|
||||
set_property ACCESS {read-only} $field
|
||||
set_property BIT_OFFSET {3} $field
|
||||
set_property BIT_WIDTH {1} $field
|
||||
set_property DESCRIPTION {Control signal Register for 'ap_ready'.} $field
|
||||
set_property READ_ACTION {modify} $field
|
||||
|
||||
set field [ipx::add_field RESERVED_1 $reg]
|
||||
set_property ACCESS {read-only} $field
|
||||
set_property BIT_OFFSET {4} $field
|
||||
set_property BIT_WIDTH {3} $field
|
||||
set_property DESCRIPTION {Reserved. 0s on read.} $field
|
||||
set_property READ_ACTION {modify} $field
|
||||
|
||||
set field [ipx::add_field AUTO_RESTART $reg]
|
||||
set_property ACCESS {read-write} $field
|
||||
set_property BIT_OFFSET {7} $field
|
||||
set_property BIT_WIDTH {1} $field
|
||||
set_property DESCRIPTION {Control signal Register for 'auto_restart'.} $field
|
||||
set_property MODIFIED_WRITE_VALUE {modify} $field
|
||||
|
||||
set field [ipx::add_field RESERVED_2 $reg]
|
||||
set_property ACCESS {read-only} $field
|
||||
set_property BIT_OFFSET {8} $field
|
||||
set_property BIT_WIDTH {24} $field
|
||||
set_property DESCRIPTION {Reserved. 0s on read.} $field
|
||||
set_property READ_ACTION {modify} $field
|
||||
|
||||
set reg [::ipx::add_register "GIER" $addr_block]
|
||||
set_property description "Global Interrupt Enable Register" $reg
|
||||
set_property address_offset 0x004 $reg
|
||||
set_property size 32 $reg
|
||||
|
||||
set reg [::ipx::add_register "IP_IER" $addr_block]
|
||||
set_property description "IP Interrupt Enable Register" $reg
|
||||
set_property address_offset 0x008 $reg
|
||||
set_property size 32 $reg
|
||||
|
||||
set reg [::ipx::add_register "IP_ISR" $addr_block]
|
||||
set_property description "IP Interrupt Status Register" $reg
|
||||
set_property address_offset 0x00C $reg
|
||||
set_property size 32 $reg
|
||||
|
||||
set reg [::ipx::add_register -quiet "DEV" $addr_block]
|
||||
set_property address_offset 0x010 $reg
|
||||
set_property size [expr {8*8}] $reg
|
||||
|
||||
set reg [::ipx::add_register -quiet "ISA" $addr_block]
|
||||
set_property address_offset 0x01C $reg
|
||||
set_property size [expr {8*8}] $reg
|
||||
|
||||
set reg [::ipx::add_register -quiet "DCR" $addr_block]
|
||||
set_property address_offset 0x028 $reg
|
||||
set_property size [expr {8*8}] $reg
|
||||
|
||||
set reg [::ipx::add_register -quiet "SCP" $addr_block]
|
||||
set_property address_offset 0x034 $reg
|
||||
set_property size [expr {8*8}] $reg
|
||||
|
||||
for {set i 0} {$i < 1} {incr i} {
|
||||
set reg [::ipx::add_register -quiet "MEM_$i" $addr_block]
|
||||
set_property address_offset [expr {0x040 + $i * 12}] $reg
|
||||
set_property size [expr {8*8}] $reg
|
||||
set regparam [::ipx::add_register_parameter -quiet {ASSOCIATED_BUSIF} $reg]
|
||||
set_property value m_axi_mem_$i $regparam
|
||||
}
|
||||
|
||||
set_property slave_memory_map_ref "s_axi_ctrl" [::ipx::get_bus_interfaces -of $core "s_axi_ctrl"]
|
||||
|
||||
set_property xpm_libraries {XPM_CDC XPM_MEMORY XPM_FIFO} $core
|
||||
set_property sdx_kernel true $core
|
||||
set_property sdx_kernel_type rtl $core
|
||||
set_property supported_families { } $core
|
||||
set_property auto_family_support_level level_2 $core
|
||||
|
||||
ipx::create_xgui_files $core
|
||||
ipx::update_checksums $core
|
||||
ipx::check_integrity -kernel $core
|
||||
ipx::save_core $core
|
||||
close_project -delete
|
||||
25
hw/syn/xilinx/xrt/scripts/xsim.tcl
Normal file
25
hw/syn/xilinx/xrt/scripts/xsim.tcl
Normal file
@@ -0,0 +1,25 @@
|
||||
#
|
||||
# Copyright 2021 Xilinx, Inc.
|
||||
#
|
||||
# Licensed under the Apache License, Version 2.0 (the "License");
|
||||
# you may not use this file except in compliance with the License.
|
||||
# You may obtain a copy of the License at
|
||||
#
|
||||
# http://www.apache.org/licenses/LICENSE-2.0
|
||||
#
|
||||
# Unless required by applicable law or agreed to in writing, software
|
||||
# distributed under the License is distributed on an "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
# See the License for the specific language governing permissions and
|
||||
# limitations under the License.
|
||||
#
|
||||
|
||||
#log_wave -r *
|
||||
#run all
|
||||
#exit
|
||||
|
||||
open_vcd xsim_dump.vcd
|
||||
log_vcd /*
|
||||
run all
|
||||
close_vcd
|
||||
exit
|
||||
9
hw/syn/xilinx/xrt/vitis.ini
Normal file
9
hw/syn/xilinx/xrt/vitis.ini
Normal file
@@ -0,0 +1,9 @@
|
||||
[connectivity]
|
||||
#nk=vortex_afu:1
|
||||
#sp=vortex_afu_1.m_axi_mem_0:HBM[0:15]
|
||||
|
||||
[vivado]
|
||||
#prop=fileset.sim_1.xsim.elaborate.debug_level=all
|
||||
|
||||
[advanced]
|
||||
#param=compiler.userPostDebugProfileOverlayTcl=../scripts/post_dbg_profile_overlay.tcl
|
||||
11
hw/syn/xilinx/xrt/xrt.ini
Normal file
11
hw/syn/xilinx/xrt/xrt.ini
Normal file
@@ -0,0 +1,11 @@
|
||||
[Runtime]
|
||||
runtime_log=console
|
||||
|
||||
[Emulation]
|
||||
#debug_mode=batch
|
||||
#user_pre_sim_script=xsim.tcl
|
||||
|
||||
[Debug]
|
||||
profile=true
|
||||
timeline_trace=true
|
||||
data_transfer_trace=fine
|
||||
Reference in New Issue
Block a user