Vortex 2.0 changes:
+ Microarchitecture optimizations + 64-bit support + Xilinx FPGA support + LLVM-16 support + Refactoring and quality control fixes
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31
hw/rtl/interfaces/VX_commit_sched_if.sv
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31
hw/rtl/interfaces/VX_commit_sched_if.sv
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// Copyright © 2019-2023
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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`include "VX_define.vh"
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interface VX_commit_sched_if ();
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wire [`ISSUE_WIDTH-1:0] committed;
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wire [`ISSUE_WIDTH-1:0][`NW_WIDTH-1:0] committed_wid;
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modport master (
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output committed,
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output committed_wid
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);
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modport slave (
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input committed,
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input committed_wid
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);
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endinterface
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