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adding input buffering to bus arbiters to reduce backpressure delay propagation

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This commit is contained in:
Blaise Tine
2020-12-05 17:31:29 -08:00
parent 13a5370254
commit d0f2a3984d
17 changed files with 480 additions and 338 deletions
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60
hw/rtl/libs/VX_elastic_buffer.v
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@@ -4,7 +4,8 @@ module VX_elastic_buffer #(
parameter DATAW = 1,
parameter SIZE = 2,
parameter BUFFERED = 0,
parameter FASTRAM = 0
parameter FASTRAM = 0,
parameter PASSTHRU = 0
) (
input wire clk,
input wire reset,
@@ -16,30 +17,43 @@ module VX_elastic_buffer #(
output wire [DATAW-1:0] data_out,
input wire ready_out,
output wire valid_out
);
wire empty, full;
);
if (PASSTHRU) begin
wire push = valid_in && ready_in;
wire pop = valid_out && ready_out;
`UNUSED_VAR (clk)
`UNUSED_VAR (reset)
VX_generic_queue #(
.DATAW (DATAW),
.SIZE (SIZE),
.BUFFERED (BUFFERED),
.FASTRAM (FASTRAM)
) queue (
.clk (clk),
.reset (reset),
.push (push),
.pop (pop),
.data_in(data_in),
.data_out(data_out),
.empty (empty),
.full (full),
`UNUSED_PIN (size)
);
assign valid_out = valid_in;
assign data_out = data_in;
assign ready_in = ready_out;
assign ready_in = ~full;
assign valid_out = ~empty;
end else begin
wire empty, full;
wire push = valid_in && ready_in;
wire pop = valid_out && ready_out;
VX_generic_queue #(
.DATAW (DATAW),
.SIZE (SIZE),
.BUFFERED (BUFFERED),
.FASTRAM (FASTRAM)
) queue (
.clk (clk),
.reset (reset),
.push (push),
.pop (pop),
.data_in(data_in),
.data_out(data_out),
.empty (empty),
.full (full),
`UNUSED_PIN (size)
);
assign ready_in = ~full;
assign valid_out = ~empty;
end
endmodule