RTL code refactoring

hw/rtl/interfaces/VX_icache_rsp_if.v

@@ -0,0 +1,15 @@
+`ifndef VX_ICACHE_RSP
+`define VX_ICACHE_RSP
+
+`include "../VX_define.vh"
+
+interface VX_icache_rsp_if ();
+
+	// wire ready;
+	// wire stall;
+	wire [31:0]	instruction;
+	wire       	delay;
+
+endinterface
+
+`endif