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better use of valid signal

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This commit is contained in:
felsabbagh3
2019-03-27 00:07:59 -04:00
parent 7a528c5ef2
commit cc0fb0eece
23 changed files with 171 additions and 160 deletions
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4
rtl/test_bench.h
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@@ -173,7 +173,7 @@ bool Vortex::dbus_driver()
////////////////////// DBUS //////////////////////
if (vortex->out_cache_driver_in_mem_write != NO_MEM_WRITE)
if ((vortex->out_cache_driver_in_mem_write != NO_MEM_WRITE) && vortex->out_cache_driver_in_valid)
{
data_write = (uint32_t) vortex->out_cache_driver_in_data;
addr = (uint32_t) vortex->out_cache_driver_in_address;
@@ -195,7 +195,7 @@ bool Vortex::dbus_driver()
}
if (vortex->out_cache_driver_in_mem_read != NO_MEM_READ)
if ((vortex->out_cache_driver_in_mem_read != NO_MEM_READ) && vortex->out_cache_driver_in_valid)
{
addr = (uint32_t) vortex->out_cache_driver_in_address;