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fix quartus build

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This commit is contained in:
Blaise Tine
2020-04-21 00:55:18 -07:00
parent d6255f0445
commit cb0afd3eec
6 changed files with 67 additions and 80 deletions
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4
hw/syn/quartus/cache/Makefile vendored
View File

@@ -1,6 +1,6 @@
PROJECT = VX_cache
TOP_LEVEL_ENTITY = VX_cache
SRC_FILE = ../../../rtl/cache/VX_cache.v
SRC_FILE = VX_cache.v
PROJECT_FILES = $(PROJECT).qpf $(PROJECT).qsf
# Part, Family
@@ -49,7 +49,7 @@ smart.log: $(PROJECT_FILES)
# Project initialization
$(PROJECT_FILES):
quartus_sh -t project.tcl -project $(PROJECT) -family $(FAMILY) -device $(DEVICE) -top $(TOP_LEVEL_ENTITY) -src $(SRC_FILE) -sdc project.sdc -inc "../;../../"
quartus_sh -t project.tcl -project $(PROJECT) -family $(FAMILY) -device $(DEVICE) -top $(TOP_LEVEL_ENTITY) -src $(SRC_FILE) -sdc project.sdc -inc "../../../rtl;../../../rtl/libs;../../../rtl/interfaces;../../../rtl/cache"
syn.chg:
$(STAMP) syn.chg

31
hw/syn/quartus/top/Makefile
View File

@@ -1,10 +1,8 @@
PROJECT = Vortex
TOP_LEVEL_ENTITY = Vortex_Socket
SRC_FILE = ../../../rtl/Vortex.v
TOP_LEVEL_ENTITY = Vortex
SRC_FILE = Vortex.v
PROJECT_FILES = $(PROJECT).qpf $(PROJECT).qsf
QUARTUS_ROOT ?= /tools/reconfig/intel/18.0
# Part, Family
FAMILY = "Arria 10"
DEVICE = 10AX115N3F40E2SG
@@ -16,7 +14,7 @@ ASM_ARGS =
STA_ARGS = --do_report_timing
# Build targets
all: $(PROJECT).sta.rpt $(PROJECT).pow.rpt
all: $(PROJECT).sta.rpt
syn: $(PROJECT).syn.rpt
@@ -26,38 +24,32 @@ asm: $(PROJECT).asm.rpt
sta: $(PROJECT).sta.rpt
pow: $(PROJECT).pow.rpt
smart: smart.log
# Target implementations
STAMP = echo done >
$(PROJECT).syn.rpt: smart.log syn.chg $(SOURCE_FILES)
$(QUARTUS_ROOT)/quartus/bin/quartus_syn $(PROJECT) $(SYN_ARGS)
quartus_syn $(PROJECT) $(SYN_ARGS)
$(STAMP) fit.chg
$(PROJECT).fit.rpt: smart.log fit.chg $(PROJECT).syn.rpt
$(QUARTUS_ROOT)/quartus/bin/quartus_fit $(PROJECT) $(FIT_ARGS)
quartus_fit $(PROJECT) $(FIT_ARGS)
$(STAMP) asm.chg
$(STAMP) sta.chg
$(PROJECT).asm.rpt: smart.log asm.chg $(PROJECT).fit.rpt
$(QUARTUS_ROOT)/quartus/bin/quartus_asm $(PROJECT) $(ASM_ARGS)
quartus_asm $(PROJECT) $(ASM_ARGS)
$(PROJECT).sta.rpt: smart.log sta.chg $(PROJECT).fit.rpt
$(QUARTUS_ROOT)/quartus/bin/quartus_sta $(PROJECT) $(STA_ARGS)
$(QUARTUS_ROOT)/quartus/bin/quartus_sta -t VX_timing.tcl
$(PROJECT).pow.rpt: smart.log pow.chg $(PROJECT).fit.rpt
$(QUARTUS_ROOT)/quartus/bin/quartus_pow $(PROJECT)
quartus_sta $(PROJECT) $(STA_ARGS)
smart.log: $(PROJECT_FILES)
$(QUARTUS_ROOT)/quartus/bin/quartus_sh --determine_smart_action $(PROJECT) > smart.log
quartus_sh --determine_smart_action $(PROJECT) > smart.log
# Project initialization
$(PROJECT_FILES):
$(QUARTUS_ROOT)/quartus/bin/quartus_sh -t project.tcl -project $(PROJECT) -family $(FAMILY) -device $(DEVICE) -top $(TOP_LEVEL_ENTITY) -src $(SRC_FILE) -sdc vortex.sdc -inc "..;../libs;../interfaces;../pipe_regs;../cache"
quartus_sh -t project.tcl -project $(PROJECT) -family $(FAMILY) -device $(DEVICE) -top $(TOP_LEVEL_ENTITY) -src $(SRC_FILE) -sdc project.sdc -inc "../../../rtl;../../../rtl/libs;../../../rtl/interfaces;../../../rtl/pipe_regs;../../../rtl/cache"
syn.chg:
$(STAMP) syn.chg
@@ -71,11 +63,8 @@ sta.chg:
asm.chg:
$(STAMP) asm.chg
pow.chg:
$(STAMP) pow.chg
program: $(PROJECT).sof
$(QUARTUS_ROOT)/quartus/bin/quartus_pgm --no_banner --mode=jtag -o "P;$(PROJECT).sof"
quartus_pgm --no_banner --mode=jtag -o "P;$(PROJECT).sof"
clean:
rm -rf bin *.rpt *.chg *.qsf *.qpf smart.log *.htm *.eqn *.pin *.sof *.pof qdb incremental_db tmp-clearbox