Define SIMULATION under VERILATOR

This commit is contained in:
Hansung Kim
2024-01-25 23:23:34 -08:00
parent b9b675a288
commit c9d1275f0e

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@@ -50,6 +50,7 @@
`define TRACE(level, args) $write args
`else
`ifdef VERILATOR
`define SIMULATION
`define TRACING_ON /* verilator tracing_on */
`define TRACING_OFF /* verilator tracing_off */
`ifndef NDEBUG