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hw/rtl/cache/VX_cache_define.vh
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hw/rtl/cache/VX_cache_define.vh
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@@ -55,6 +55,7 @@
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///////////////////////////////////////////////////////////////////////////////
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// NOTE(hansung): what does CORE_TAG_ID_BITS == 0 mean?
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`define CORE_RSP_TAGS ((CORE_TAG_ID_BITS != 0) ? 1 : NUM_REQS)
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`define LINE_TO_MEM_ADDR(x, i) {x, `BANK_SELECT_BITS'(i)}
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