More doc comments

2023-09-10 14:45:23 -07:00
parent 9efdd2ebb7
commit c90fe56588
5 changed files with 15 additions and 1 deletions
--- a/hw/rtl/cache/VX_cache.sv
+++ b/hw/rtl/cache/VX_cache.sv
@@ -250,6 +250,8 @@ module VX_cache #(
    wire [MEM_TAG_IN_WIDTH-1:0]     mem_rsp_tag_c;
    wire                            mem_rsp_ready_c;

+    // NOTE(hansung): non-cacheable addresses. Although is this applied for
+    // all address range?
    if (NC_ENABLE) begin
        VX_nc_bypass #( 
            .NUM_PORTS         (NUM_PORTS),