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VCD for power

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This commit is contained in:
fares
2019-11-21 23:25:51 -05:00
parent d8d98d8ea7 b4ebc803f3
commit c4d315dfed
37 changed files with 30538 additions and 820290 deletions
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2
benchmarks/opencl/saxpy/Makefile
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@@ -34,7 +34,7 @@ PROJECT=saxpy
all: $(PROJECT).dump $(PROJECT).hex all: $(PROJECT).dump $(PROJECT).hex
lib$(PROJECT).a: kernel.cl lib$(PROJECT).a: kernel.cl
POCL_DEBUG=all POCL_DEBUG_LLVM_PASSES=1 LD_LIBRARY_PATH=$(RISCV_TOOL_PATH)/lib:$(POCL_CC_PATH)/lib $(POCL_CC_PATH)/bin/poclcc -o kernel.pocl kernel.cl POCL_DEBUG=all POCL_DEBUG_LLVM_PASSES=1 LD_LIBRARY_PATH=$(RISCV_TOOL_PATH)/lib:$(POCL_CC_PATH)/lib $(POCL_CC_PATH)/bin/poclcc -o lib$(PROJECT).a kernel.cl
$(PROJECT).elf: main.cc lib$(PROJECT).a $(PROJECT).elf: main.cc lib$(PROJECT).a
$(CXX) $(CXXFLAGS) -I$(POCL_RT_PATH)/include -L$(POCL_RT_PATH)/lib/static -L. $(VX_SRCS) main.cc -Wl,--whole-archive -l$(PROJECT) -Wl,--no-whole-archive $(LIBS) -o $(PROJECT).elf $(CXX) $(CXXFLAGS) -I$(POCL_RT_PATH)/include -L$(POCL_RT_PATH)/lib/static -L. $(VX_SRCS) main.cc -Wl,--whole-archive -l$(PROJECT) -Wl,--no-whole-archive $(LIBS) -o $(PROJECT).elf

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benchmarks/opencl/sfilter/Makefile
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@@ -34,7 +34,7 @@ PROJECT=sfilter
all: $(PROJECT).dump $(PROJECT).hex all: $(PROJECT).dump $(PROJECT).hex
lib$(PROJECT).a: kernel.cl lib$(PROJECT).a: kernel.cl
POCL_DEBUG=all POCL_DEBUG_LLVM_PASSES=1 LD_LIBRARY_PATH=$(RISCV_TOOL_PATH)/lib:$(POCL_CC_PATH)/lib $(POCL_CC_PATH)/bin/poclcc -o kernel.pocl kernel.cl POCL_DEBUG=all POCL_DEBUG_LLVM_PASSES=1 LD_LIBRARY_PATH=$(RISCV_TOOL_PATH)/lib:$(POCL_CC_PATH)/lib $(POCL_CC_PATH)/bin/poclcc -o lib$(PROJECT).a kernel.cl
$(PROJECT).elf: main.cc lib$(PROJECT).a $(PROJECT).elf: main.cc lib$(PROJECT).a
$(CXX) $(CXXFLAGS) -I$(POCL_RT_PATH)/include -L$(POCL_RT_PATH)/lib/static -L. $(VX_SRCS) main.cc -Wl,--whole-archive -l$(PROJECT) -Wl,--no-whole-archive $(LIBS) -o $(PROJECT).elf $(CXX) $(CXXFLAGS) -I$(POCL_RT_PATH)/include -L$(POCL_RT_PATH)/lib/static -L. $(VX_SRCS) main.cc -Wl,--whole-archive -l$(PROJECT) -Wl,--no-whole-archive $(LIBS) -o $(PROJECT).elf

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benchmarks/opencl/sgemm/Makefile
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@@ -34,7 +34,7 @@ PROJECT=sgemm
all: $(PROJECT).dump $(PROJECT).hex all: $(PROJECT).dump $(PROJECT).hex
lib$(PROJECT).a: kernel.cl lib$(PROJECT).a: kernel.cl
POCL_DEBUG=all POCL_DEBUG_LLVM_PASSES=1 LD_LIBRARY_PATH=$(RISCV_TOOL_PATH)/lib:$(POCL_CC_PATH)/lib $(POCL_CC_PATH)/bin/poclcc -o kernel.pocl kernel.cl POCL_DEBUG=all POCL_DEBUG_LLVM_PASSES=1 LD_LIBRARY_PATH=$(RISCV_TOOL_PATH)/lib:$(POCL_CC_PATH)/lib $(POCL_CC_PATH)/bin/poclcc -o lib$(PROJECT).a kernel.cl
$(PROJECT).elf: main.cc lib$(PROJECT).a $(PROJECT).elf: main.cc lib$(PROJECT).a
$(CXX) $(CXXFLAGS) -I$(POCL_RT_PATH)/include -L$(POCL_RT_PATH)/lib/static -L. $(VX_SRCS) main.cc -Wl,--whole-archive -l$(PROJECT) -Wl,--no-whole-archive $(LIBS) -o $(PROJECT).elf $(CXX) $(CXXFLAGS) -I$(POCL_RT_PATH)/include -L$(POCL_RT_PATH)/lib/static -L. $(VX_SRCS) main.cc -Wl,--whole-archive -l$(PROJECT) -Wl,--no-whole-archive $(LIBS) -o $(PROJECT).elf

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emulator/enc.cpp
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@@ -381,15 +381,7 @@ Instruction *WordDecoder::decode(const std::vector<Byte> &v, Size &idx) {
imeed = 0 | (bits_10_1 << 1) | (bit_11 << 11) | (bits_19_12 << 12) | (bit_20 << 20); imeed = 0 | (bits_10_1 << 1) | (bit_11 << 11) | (bits_19_12 << 12) | (bit_20 << 20);
// cout << "Immediate src: " << hex << imeed << "\n"; inst.setSrcImm(signExt(imeed, 20, j_immed_mask));
// cout << "bit 20 = " << bit_20 << '\n';
// if (bit_20 == 1)
// {
// imeed = imeed * -1;
// }
inst.setSrcImm(signExt(imeed, 21, j_immed_mask));
usedImm = true; usedImm = true;
break; break;
defualt: defualt:

4
emulator/test_riscv.sh
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@@ -1,6 +1,6 @@
echo start > results.txt echo start > results.txt
# echo ../kernel/vortex_test.hex # echo ../kernel/vortex_test.hex
# ./harptool -E -a rv32i --core ../runtime/mains/simple/vx_simple_main.hex -s -b 1> emulator.debug ./harptool -E -a rv32i --core ../runtime/mains/simple/vx_simple_main.hex -s -b 1> emulator.debug
./harptool -E -a rv32i --core ../benchmarks/opencl/sgemm/sgemm.hex -s -b 1> emulator.debug # ./harptool -E -a rv32i --core ../benchmarks/opencl/sgemm/sgemm.hex -s -b 1> emulator.debug
# ./harptool -E -a rv32i --core ../runtime/mains/vector_test/vx_vector_main.hex -s -b 1> emulator.debug # ./harptool -E -a rv32i --core ../runtime/mains/vector_test/vx_vector_main.hex -s -b 1> emulator.debug

2
rtl/VX_define.v
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@@ -12,7 +12,7 @@
// `define ONLY // `define ONLY
// `define SYN 1 // `define SYN 1
//`define ASIC 1 // `define ASIC 1
`define NUM_BARRIERS 4 `define NUM_BARRIERS 4

30
rtl/VX_writeback.v
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@@ -63,14 +63,40 @@ module VX_writeback (
wire zero = 0; wire zero = 0;
wire[`NT-1:0][31:0] use_wb_data;
reg prev_is_mem;
always @(posedge clk, posedge reset) begin
if (reset)
begin
prev_is_mem = 0;
end begin
prev_is_mem = mem_wb && !no_slot_mem;
end
end
VX_generic_register #(.N(39 + `NW_M1 + 1 + `NT*33)) wb_register( VX_generic_register #(.N(39 + `NW_M1 + 1 + `NT*33)) wb_register(
.clk (clk), .clk (clk),
.reset(reset), .reset(reset),
.stall(zero), .stall(zero),
.flush(zero), .flush(zero),
.in ({VX_writeback_tempp.write_data, VX_writeback_tempp.wb_valid, VX_writeback_tempp.rd, VX_writeback_tempp.wb, VX_writeback_tempp.wb_warp_num, VX_writeback_tempp.wb_pc}), .in ({VX_writeback_tempp.write_data, VX_writeback_tempp.wb_valid, VX_writeback_tempp.rd, VX_writeback_tempp.wb, VX_writeback_tempp.wb_warp_num, VX_writeback_tempp.wb_pc}),
.out ({VX_writeback_inter.write_data, VX_writeback_inter.wb_valid, VX_writeback_inter.rd, VX_writeback_inter.wb, VX_writeback_inter.wb_warp_num, VX_writeback_inter.wb_pc}) .out ({use_wb_data , VX_writeback_inter.wb_valid, VX_writeback_inter.rd, VX_writeback_inter.wb, VX_writeback_inter.wb_warp_num, VX_writeback_inter.wb_pc})
); );
`ifdef SYN
assign VX_writeback_inter.write_data = prev_is_mem ? VX_writeback_tempp.write_data : use_wb_data;
`else
assign VX_writeback_inter.write_data = use_wb_data;
`endif
endmodule // VX_writeback
endmodule // VX_writeback

4
rtl/modelsim/Makefile
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@@ -78,7 +78,9 @@ SRC = \
../../models/memory/cln28hpm/rf2_128x128_wm1/rf2_128x128_wm1.v \ ../../models/memory/cln28hpm/rf2_128x128_wm1/rf2_128x128_wm1.v \
../../models/memory/cln28hpm/rf2_256x128_wm1/rf2_256x128_wm1.v \ ../../models/memory/cln28hpm/rf2_256x128_wm1/rf2_256x128_wm1.v \
../../models/memory/cln28hpm/rf2_256x19_wm0/rf2_256x19_wm0.v \ ../../models/memory/cln28hpm/rf2_256x19_wm0/rf2_256x19_wm0.v \
../../models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1.v ../../models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1.v \
../../models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0.v
# ../../models/memory/cln28hpc/rf2_32x128_wm1/rf2_32x128_wm1.v # ../../models/memory/cln28hpc/rf2_32x128_wm1/rf2_32x128_wm1.v
# vortex_dpi.h # vortex_dpi.h

12
runtime/mains/vector_test/Makefile
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@@ -1,10 +1,13 @@
COMP = /home/fares/dev/riscv-gnu-toolchain-vector/drops/bin/riscv32-unknown-elf-gcc COMP = /home/priya/dev/riscv_vec/riscv-gnu/bin/riscv32-unknown-elf-gcc
CC_FLAGS = -ffreestanding -O0 -Wl,--gc-sections -nostartfiles -nostdlib -nostartfiles -nodefaultlibs -Wl,-Bstatic,-T,../vortex_link.ld -march=rv32imv -mabi=ilp32 CC_FLAGS = -ffreestanding -O0 -Wl,--gc-sections -nostartfiles -nostdlib -nostartfiles -nodefaultlibs -Wl,-Bstatic,-T,../vortex_link.ld -march=rv32imv -mabi=ilp32
DMP = /home/fares/dev/riscv-gnu-toolchain-vector/drops/bin/riscv32-unknown-elf-objdump #DMP = /home/fares/dev/riscv-gnu-toolchain-vector/drops/bin/riscv32-unknown-elf-objdump
CPY = /home/fares/dev/riscv-gnu-toolchain-vector/drops/bin/riscv32-unknown-elf-objcopy #CPY = /home/fares/dev/riscv-gnu-toolchain-vector/drops/bin/riscv32-unknown-elf-objcopy
DMP = /home/priya/dev/riscv_vec/riscv-gnu/bin/riscv32-unknown-elf-objdump
CPY = /home/priya/dev/riscv_vec/riscv-gnu/bin/riscv32-unknown-elf-objcopy
# VX_STR = ../../startup/vx_start.s # VX_STR = ../../startup/vx_start.s
@@ -18,7 +21,8 @@ VX_API = ../../vx_api/vx_api.c
VX_TEST = ../../tests/tests.c VX_TEST = ../../tests/tests.c
VX_FIO = ../../fileio/fileio.s VX_FIO = ../../fileio/fileio.s
VX_VEC = vx_vec.s VX_VEC = vx_vec.s
LIBS = /home/fares/dev/riscv-gnu-toolchain-vector/drops/riscv32-unknown-elf/lib/libc.a /home/fares/dev/riscv-gnu-toolchain-vector/drops/riscv32-unknown-elf/lib/libstdc++.a -static-libgcc -lgcc #LIBS = /home/fares/dev/riscv-gnu-toolchain-vector/drops/riscv32-unknown-elf/lib/libc.a /home/fares/dev/riscv-gnu-toolchain-vector/drops/riscv32-unknown-elf/lib/libstdc++.a -static-libgcc -lgcc
LIBS = /home/priya/dev/riscv_vec/riscv-gnu/riscv32-unknown-elf/lib/libc.a /home/priya/dev/riscv_vec/riscv-gnu/riscv32-unknown-elf/lib/libstdc++.a -static-libgcc -lgcc
VX_MAIN = vx_vector_main VX_MAIN = vx_vector_main

15
runtime/mains/vector_test/vx_vec.s
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@@ -4,4 +4,19 @@
.type vx_vec_test, @function .type vx_vec_test, @function
.global vx_vec_test .global vx_vec_test
vx_vec_test: vx_vec_test:
li a0, 2
vsetvli t0, a0, e32, m1
li a0, 10
sw a0, 0(a1)
sw a0, 32(a1)
vlw.v v1, (a1)
li a2, 1
sw a2, 0(a3)
li a2, 0
sw a2, 32(a3)
vlw.v v0, (a3)
vmor.mm v0, v0, v3
vadd.vv v1, v1, v1, v0.t
vsw.v v1, (a1)
vlw.v v5, (a1)
ret ret

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@@ -1,224 +1,290 @@
:0200000480007A :0200000480007A
:100000009705000093854507130540006B10B50068 :10000000970500009385C506130540006B10B500E9
:10001000EF004006130510006B00050017250000D7 :10001000EF00C005130510006B000500138581C3B8
:100020001305C5D917260000130686D93306A64046 :100020001386C1C33306A64093050000EF00501F9E
:1000300093050000EF00806B170500001305855B3A :10003000171500001305458FEF00900AEF0090148C
:10004000EF00C056EF00C060130540006B000500D4 :10004000130540006B000500EF00D0056F00900A1B
:08005000EF0080526F00C05662 :10005000B707000093870700638807003715008003
:10005800B70700009387070063880700370500800B :10006000130545926F00D00767800000130540001C
:100068001305055F6F00005467800000130540000A :100070006B0005009711000093814179F32610026F
:100078006B0005009721000093814110F3261002C0 :100080009396A601732600029315A6001316260068
:100088009396A601732600029315A6001316260060 :1000900037F1FF6F3301B1403301D1403301C1006B
:1000980037F1FF6F3301B1403301D1403301C10063 :1000A000F326100263860600130500006B000500AE
:1000A800F326100263860600130500006B000500A6 :1000B0006780000013052000D77285001305A0009B
:1000B8006780000067800000130101FD232681028C :1000C00023A0A50023A0A50287E0051213061000B7
:1000C80013040103232EA4FC232CB4FC232AC4FC10 :1000D00023A0C6001306000023A0C60207E00612F4
:1000D8008327C4FD83A707002326F4FE832744FD56 :1000E00057A0016AD7801000A7E0050287E2051239
:1000E8002322F4FE832744FE03C707008327C4FEA8 :1000F00067800000130101FD232681021304010320
:1000F8002380E7008327C4FE93871700032744FE65 :10010000232EA4FC232CB4FC232AC4FC8327C4FD87
:10010800034717002380E7008327C4FE938727004F :1001100083A707002326F4FE930744FD2322F4FE61
:10011800032744FE034727002380E7008327C4FE04 :10012000832744FE03C707008327C4FE2380E7001C
:1001280093873700032744FE034737002380E700FF :100130008327C4FE93871700032744FE0347170055
:100138008327C4FE938747002326F4FE232404FE66 :100140002380E7008327C4FE93872700032744FE0C
:100148006F004003832784FE032784FDB307F7006D :10015000034727002380E7008327C4FE93873700E7
:1001580003C707008327C4FE2380E7008327C4FE64 :10016000032744FE034737002380E7008327C4FEAC
:10016800938717002326F4FE832784FE93871700BE :10017000938747002326F4FE232404FE6F004003E8
:100178002324F4FE032784FE832744FDE344F7FC8D :10018000832784FE032784FDB307F70003C7070016
:100188008327C4FD0327C4FE23A0E7001300000053 :100190008327C4FE2380E7008327C4FE93871700CC
:100198000324C1021301010367800000130101FD5C :1001A0002326F4FE832784FE938717002324F4FE7E
:1001A8002326810213040103232EA4FC232CB4FC70 :1001B000832744FD032784FEE344F7FC8327C4FE22
:1001B8008327C4FD83A707002326F4FE832744FE74 :1001C0002320F4FE832704FE93F73700032704FE61
:1001C8002320F4FE8327C4FE03C70700832704FE09 :1001D000B307F7002320F4FE832704FE2326F4FE52
:1001D8002380E700832704FE938717000327C4FEC4 :1001E0008327C4FD0327C4FE23A0E70013000000FB
:1001E800034717002380E700832704FE938727002F :1001F0000324C1021301010367800000130101FC05
:1001F8000327C4FE034727002380E700832704FE64 :10020000232E8102130401042326A4FC2324B4FC1E
:10020800938737000327C4FE034737002380E7009E :100210008327C4FC83A707002326F4FE9307C4FDAD
:100218008327C4FE938747002326F4FE232404FE85 :100220002322F4FE8327C4FE03C70700832744FE6E
:100228006F004003832784FE032784FDB307F7008C :100230002380E700832744FE938717000327C4FE2B
:100238000327C4FE034707002380E7008327C4FE83 :10024000034717002380E700832744FE9387270096
:10024800938717002326F4FE832784FE93871700DD :100250000327C4FE034727002380E700832744FECB
:100258002324F4FE032784FE832744FEE344F7FCAB :10026000938737000327C4FE034737002380E70046
:100268008327C4FD0327C4FE23A0E7001300000072 :100270008327C4FE938747002326F4FE232404FE2D
:100278000324C1021301010367800000130101FF79 :100280006F004003832784FE032784FCB307F70035
:100288002326810013040101130000000324C10088 :100290000327C4FE034707002380E7008327C4FE2B
:100298001301010167800000130101FE232E810074 :1002A000938717002326F4FE832784FE9387170085
:1002A800130401022326A4FE2324B4FE832784FE1C :1002B0002324F4FE8327C4FD032784FEE344F7FCD4
:1002B8003727000023A2E7009307000013850700F3 :1002C0008327C4FE2320F4FE832704FE93F7370020
:1002C8000324C1011301010267800000130101FE2C :1002D000032704FEB307F7002320F4FE832704FE60
:1002D800232E8100130401022326A4FE9307100095 :1002E0002326F4FE8327C4FC0327C4FE23A0E700D3
:1002E800138507000324C101130101026780000080 :1002F000130000000324C103130101046780000000
:1002F800130101FF232681001304010113000000EC :10030000130101FF232681001304010113000000E3
:100308000324C1001301010167800000130101FFEC :100310000324C1001301010167800000130101FEE5
:100318002326810013040101130000000324C100F7 :10032000232E8100130401022326A4FE2324B4FEFD
:100328001301010167800000130101FD23268102EA :10033000832784FE3727000023A2E70093070000ED
:1003380013040103232EA4FC232CB4FC232AC4FC9D :10034000138507000324C101130101026780000027
:10034800B70701002324F4FE232604FE6F00C00231 :10035000130101FE232E1100232C8100130401023E
:100358008327C4FE032784FDB307F70083C707007C :100360002326A4FEB71700801385C7CEEF00C04F29
:1003680013870700832784FE23A0E7008327C4FEA2 :1003700093071000138507008320C1010324810126
:10037800938717002326F4FE0327C4FE832744FD32 :100380001301010267800000130101FD2326110201
:10038800E348F7FC832744FD138507000324C102D3 :100390002324810213040103232EA4FC232CB4FC88
:100398001301010367800000130101FD2326810278 :1003A000232AC4FCB70700712326F4FEB7070072A6
:1003A80013040103232EA4FC8327C4FD63D807008C :1003B0002324F4FE930730002322F4FE130744FEA7
:1003B8008327C4FDB307F040232EF4FC0327C4FDB4 :1003C0009307C4FE1306400093050700138507003A
:1003C800B73700009387078063D8E700B737000086 :1003D000EFF05FD21307C4FD9307C4FE130640007D
:1003D80093870780232EF4FC83A701C32326F4FE0A :1003E0009305070013850700EFF0DFD0130784FDA6
:1003E80003A701C38327C4FD3307F70023A8E1C28D :1003F0009307C4FE1306400093050700138507000A
:1003F8008327C4FE138507000324C10213010103E8 :10040000EFF05FCF130744FD9307C4FE13064000CF
:1004080067800000130101FE232E1100232C8100B8 :100410009305070013850700EFF0DFCD83A7C1C266
:10041800130401022326A4FE13050000EF00400E7A :10042000E7800700130704FE930784FE9305070087
:10042800130000008320C10103248101130101028C :1004300013850700EFF09FDC832704FE1385070078
:1004380067800000130101FF2326810013040101D6 :100440008320C1020324810213010103678000009D
:10044800130000000324C1001301010167800000AC :10045000130101FD23261102232481021304010349
:10045800130101FF2326810013040101130000008A :10046000232EA4FC232CB4FC232AC4FCB707007160
:100468000324C1001301010167800000130101FF8B :100470002324F4FEB70700722326F4FE93074000FE
:10047800232611002324810013040101EF00C00A80 :100480002322F4FE130744FE930784FE1306400064
:1004880093070500138507008320C100032481001A :100490009305070013850700EFF0DFC51307C4FDC0
:100498001301010167800000130101FF2326810079 :1004A000930784FE13064000930507001385070099
:1004A80013040101130000000324C100130101011A :1004B000EFF05FC4130784FD930784FE130640002A
:1004B80067800000130101FF232681001304010156 :1004C0009305070013850700EFF0DFC2130744FD13
:1004C80083A781C39386170023ACD1C21385070085 :1004D000930784FE13064000930507001385070069
:1004D8000324C1001301010167800000130101FF1B :1004E000EFF05FC183A7C1C2E7800700832744FD07
:1004E8002326810013040101130000000324C10026 :1004F000138507008320C102032481021301010335
:1004F80013010101678000006B10B50067800000E0 :1005000067800000130101FD2326110223248102CC
:100508006B000500678000006B40B5006780000045 :1005100013040103232EA4FC232CB4FC232AC4FCC3
:100518006B200500678000006B30000067800000DA :10052000B70700712326F4FE930750002324F4FE3E
:1005280073251002678000007325000267800000B1 :10053000130784FE9307C4FE1306400093050700CB
:10053800130540006B000500F32610029396F600A1 :1005400013850700EFF01FBB1307C4FD9307C4FE1C
:10054800732600029315A6001316260037F1FF6FD5 :10055000130640009305070013850700EFF09FB9CD
:100558003301B1403301D1403301C100F326100209 :100560009307C4FE032644FD832584FD13850700FD
:1005680063860600130500006B0005006780000025 :10057000EFF05FB883A7C1C2E7800700832744FD7F
:10057800130101FF23261100232481001304010124 :10058000138507008320C1020324810213010103A4
:1005880013051000EFF0DFF7EFF0DFB21300000003 :1005900067800000130101FD23268102130401037B
:10059800138507008320C100032481001301010192 :1005A000232EA4FC8327C4FD63D807008327C4FD42
:1005A800678000009305050093060000130600000D :1005B000B307F040232EF4FC0327C4FDB737000037
:1005B800130500006F00C020130101FF9305000020 :1005C0009387078063D8E700B737000093870780D9
:1005C800232481002326110013040500EF00C0280E :1005D000232EF4FC83A701C32326F4FE03A701C343
:1005D80003A581C28327C50363840700E78007005A :1005E0008327C4FD3307F70023A8E1C28327C4FE95
:1005E80013050400EFF01FE2130101FF232481002B :1005F000138507000324C102130101036780000073
:1005F8002322910037240080B72400809387C49772 :10060000130101FE232E1100232C8100130401028B
:100608001304C4973304F4402326110013542440E0 :100610002326A4FE13050000EF00001E13000000B7
:1006180063020402931424009384C4FFB384F40097 :100620008320C101032481011301010267800000BE
:1006280083A704001304F4FF9384C4FFE780070042 :10063000130101FD23261102232481021304010367
:10063800E31804FE8320C1000324810083244100C1 :10064000232EA4FC232CB4FC232AC4FCB70700717E
:100648001301010167800000130101FF23248100C9 :100650002326F4FEB70700722324F4FE93077000EC
:1006580023202101372400803729008093078497BD :100660002322F4FE130744FE9307C4FE1306400042
:10066800130989973309F9402326110023229100A1 :100670009305070013850700EFF0DFA71307C4FDFC
:100678001359294063000902130484979304000066 :100680009307C4FE13064000930507001385070077
:10068800832704009384140013044400E7800700C0 :10069000EFF05FA6130784FD9307C4FE1306400026
:10069800E31899FE37240080372900809307849750 :1006A0009305070013850700EFF0DFA4130744FD4F
:1006A8001309C9973309F94013592940630009020E :1006B0009307C4FE13064000930507001385070047
:1006B8001304849793040000832704009384140090 :1006C000EFF05FA383A7C1C2E7800700130704FE12
:1006C80013044400E7800700E31899FE8320C10063 :1006D000930784FE9305070013850700EFF01FB210
:1006D800032481008324410003290100130101013F :1006E000832704FE138507008320C10203248102AF
:1006E800678000001303F00013070500637EC30250 :1006F0001301010367800000130101FF232611008D
:1006F8009377F7006390070A63920508937606FFDD :100700002324810013040101B7170080138507D04B
:100708001376F600B386E6002320B7002322B7004D :10071000EF008015130000008320C1000324810036
:100718002324B7002326B70013070701E366D7FE93 :100720001301010167800000130101FF232611005E
:100728006314060067800000B306C3409396260052 :100730002324810013040101EF00800E93070500BC
:1007380097020000B38656006780C6002307B700FB :10074000138507008320C1000324810013010101E8
:10074800A306B7002306B700A305B7002305B70023 :1007500067800000130101FF23261100232481007C
:10075800A304B7002304B700A303B7002303B7001B :1007600013040101B7170080138547D2EF00C00FB3
:10076800A302B7002302B700A301B7002301B70013 :10077000130000008320C100032481001301010144
:10077800A300B7002300B7006780000093F5F50FCA :1007800067800000130101FF23261100232481004C
:1007880093968500B3E5D50093960501B3E5D500AA :1007900013040101B7170080138587D4EF00C00C44
:100798006FF0DFF69396270097020000B3865600A5 :1007A00083A781C39386170023ACD1C213850700AA
:1007A80093820000E78006FA93800200938707FF90 :1007B0008320C10003248100130101016780000030
:1007B8003307F7403306F600E378C3F66FF0DFF34C :1007C000130101FF232611002324810013040101DA
:1007C80003A781C283278714638C070403A7470004 :1007D000B7170080138547D7EF000009130000000A
:1007D8001308F001634EE8061318270063060502A4 :1007E0008320C10003248100130101016780000000
:1007E800338307012324C30883A88718130610003E :1007F0006B10B500678000006B000500678000008B
:1007F8003316E600B3E8C80023A417192324D3103E :100800006B40B500678000006B200500678000002A
:10080800930620006304D5021307170023A2E7000C :100810006B300000678000007325100267800000C5
:10081800B387070123A4B700130500006780000011 :100820007325000267800000130540006B0005007F
:100828009307C7142324F7146FF05FFA83A6C71839 :10083000F32610029396F600732600029315A60085
:100838001307170023A2E70033E6C60023A6C7184C :100840001316260037F1FF6F3301B1403301D14059
:10084800B387070123A4B7001305000067800000E1 :100850003301C100F3261002638606001305000071
:100858001305F0FF67800000130101FD23248101C7 :100860006B00050067800000130141FF2320110089
:1008680003AC81C2232E3101232C4101232A5101DB :100870002322B1008345050063880500EF00C00115
:1008780023286101232611022324810223229102C5 :10088000130515006FF01FFF832001008325410031
:100888002320210323267101930A0500138B0500F9 :100890001301C10067800000B702010023A0B2006D
:10089800130A10009309F0FF03298C146308090256 :1008A00067800000130101FF23261100232481002B
:1008A800832449001384F4FF6342040293942400D0 :1008B0001304010113051000EFF01FF4EFF08FFF98
:1008B800B304990063040B0483A74410638067059D :1008C00013050000EFF05FF313000000138507002D
:1008C8001304F4FF9384C4FFE31634FF8320C102AA :1008D0008320C1000324810013010101678000000F
:1008D8000324810283244102032901028329C101DF :1008E00093050500930600001306000013050000A1
:1008E800032A8101832A4101032B0101832BC100C3 :1008F0006F00C020130101FF930500002324810035
:1008F800032C81001301010367800000832749004E :100900002326110013040500EF00C02803A581C2AF
:1009080083A644009387F7FF638A870423A2040021 :100910008327C50363840700E780070013050400ED
:10091800E38806FA8327891833178A00832B49004E :10092000EFF01FCE130101FF232481002322910049
:10092800B377F700639E0700E78006008327490036 :1009300037140080B71400809387440013044400E8
:10093800E39477F783278C14E38427F96FF0DFF5C6 :100940003304F440232611001354244063020402AC
:100948008327C91883A544083377F700631C070079 :10095000931424009384C4FFB384F40083A7040099
:1009580013850A00E78006006FF05FFD23228900F7 :100960001304F4FF9384C4FFE7800700E31804FE38
:100968006FF01FFB13850500E78006006FF01FFC82 :100970008320C1000324810083244100130101016D
:041978005800008093 :1009800067800000130101FF23248100232021013F
:10198000000000006C1C0080D41C00803C1D008006 :1009900037140080371900809307040013090900F9
:101990000000000000000000000000000000000047 :1009A0003309F940232611002322910013592940CD
:1019A0000000000000000000000000000000000037 :1009B0006300090213040400930400008327040069
:1019B0000000000000000000000000000000000027 :1009C0009384140013044400E7800700E31899FEA1
:1019C0000000000000000000000000000000000017 :1009D0003714008037190080930704001309490079
:1019D0000000000000000000000000000000000007 :1009E0003309F94013592940630009021304040034
:1019E00000000000000000000000000000000000F7 :1009F000930400008327040093841400130444002C
:1019F00000000000000000000000000000000000E7 :100A0000E7800700E31899FE8320C10003248100DA
:101A000000000000000000000000000000000000D6 :100A100083244100032901001301010167800000C4
:101A100000000000000000000000000000000000C6 :100A20001303F00013070500637EC3029377F700FA
:101A200000000000000000000100000000000000B5 :100A30006390070A63920508937606FF1376F60023
:101A30000E33CDAB34126DE6ECDE05000B0000007A :100A4000B386E6002320B7002322B7002324B70093
:101A40000000000000000000000000000000000096 :100A50002326B70013070701E366D7FE63140600D9
:101A50000000000000000000000000000000000086 :100A600067800000B306C3409396260097020000FB
:101A60000000000000000000000000000000000076 :100A7000B38656006780C6002307B700A306B700F9
:101A70000000000000000000000000000000000066 :100A80002306B700A305B7002305B700A304B700EA
:101A80000000000000000000000000000000000056 :100A90002304B700A303B7002303B700A302B700E2
:101A90000000000000000000000000000000000046 :100AA0002302B700A301B7002301B700A300B700DA
:101AA0000000000000000000000000000000000036 :100AB0002300B7006780000093F5F50F939685003B
:101AB0000000000000000000000000000000000026 :100AC000B3E5D50093960501B3E5D5006FF0DFF6E9
:101AC0000000000000000000000000000000000016 :100AD0009396270097020000B38656009382000089
:101AD0000000000000000000000000000000000006 :100AE000E78006FA93800200938707FF3307F740F9
:101AE00000000000000000000000000000000000F6 :100AF0003306F600E378C3F66FF0DFF303A781C295
:101AF00000000000000000000000000000000000E6 :100B000083278714638C070403A747001308F001A9
:101B000000000000000000000000000000000000D5 :100B1000634EE806131827006306050233830701B6
:101B100000000000000000000000000000000000C5 :100B20002324C30883A88718130610003316E60091
:101B200000000000000000000000000000000000B5 :100B3000B3E8C80023A417192324D3109306200078
:101B300000000000000000000000000000000000A5 :100B40006304D5021307170023A2E700B387070148
:101B40000000000000000000000000000000000095 :100B500023A4B70013050000678000009307C714A3
:101B50000000000000000000000000000000000085 :100B60002324F7146FF05FFA83A6C7181307170042
:101B60000000000000000000000000000000000075 :100B700023A2E70033E6C60023A6C718B387070100
:101B70000000000000000000000000000000000065 :100B800023A4B70013050000678000001305F0FFE1
:101B80000000000000000000000000000000000055 :100B900067800000130101FD2324810103AC81C2A1
:101B90000000000000000000000000000000000045 :100BA000232E3101232C4101232A510123286101E5
:101BA0000000000000000000000000000000000035 :100BB00023261102232481022322910223202103D0
:101BB0000000000000000000000000000000000025 :100BC00023267101930A0500138B0500130A1000F8
:101BC0000000000000000000000000000000000015 :100BD0009309F0FF03298C14630809028324490058
:101BD0000000000000000000000000000000000005 :100BE0001384F4FF6342040293942400B304990035
:101BE00000000000000000000000000000000000F5 :100BF00063040B0483A74410638067051304F4FFA8
:101BF00000000000000000000000000000000000E5 :100C00009384C4FFE31634FF8320C10203248102CE
:101C000000000000000000000000000000000000D4 :100C100083244102032901028329C101032A81019E
:101C100000000000000000000000000000000000C4 :100C2000832A4101032B0101832BC100032C810086
:101C200000000000000000000000000000000000B4 :100C300013010103678000008327490083A6440055
:101C300000000000000000000000000000000000A4 :100C40009387F7FF638A870423A20400E38806FAE8
:101C40000000000000000000000000000000000094 :100C50008327891833178A00832B4900B377F7005D
:101C50000000000000000000000000000000000084 :100C6000639E0700E780060083274900E39477F737
:101C60000000000000000000000000000000000074 :100C700083278C14E38427F96FF0DFF58327C918E5
:101C70000000000000000000000000000000000064 :100C800083A544083377F700631C070013850A0027
:101C80000000000000000000000000000000000054 :100C9000E78006006FF05FFD232289006FF01FFBE5
:101C90000000000000000000000000000000000044 :0C0CA00013850500E78006006FF01FFCC4
:101CA0000000000000000000000000000000000034 :100CAC003000000031000000320000003300000072
:101CB0000000000000000000000000000000000024 :100CBC003400000035000000360000003700000052
:101CC0000000000000000000000000000000000014 :100CCC0038000000390000006100000062000000E4
:101CD0000000000000000000000000000000000004 :100CDC006300000064000000650000006600000076
:101CE00000000000000000000000000000000000F4 :100CEC0048656C6C6F2066726F6D205F6973617400
:101CF00000000000000000000000000000000000E4 :100CFC0074790A004552524F523A205F6B696C6C02
:101D000000000000000000000000000000000000D3 :100D0C00206E6F742079657420696D706C656D65EB
:101D100000000000000000000000000000000000C3 :100D1C006E7465640A0000004552524F523A205FCF
:101D200000000000000000000000000000000000B3 :100D2C00756E6C696E6B206E6F74207965742069BA
:101D300000000000000000000000000000000000A3 :100D3C006D706C656D656E7465640A004552524F3A
:101D40000000000000000000000000000000000093 :100D4C00523A205F67657474696D656F666461798A
:101D50000000000000000000000000000000000083 :100D5C00206E6F742079657420696D706C656D659B
:101D60000000000000000000000000000000000073 :100D6C006E7465640A0000004552524F523A205F7F
:101D70000000000000000000000000000000000063 :100D7C006C696E6B206E6F742079657420696D7070
:101D80000000000000000000000000000000000053 :0A0D8C006C656D656E7465640A0005
:101D90000000000000000000000000000000000043 :04100000500000801C
:081DA00000000000000000003B :1010080000000000F41200805C130080C41300800C
:101DA8008019008000000070000000100000002072 :1010180000000000000000000000000000000000C8
:1010280000000000000000000000000000000000B8
:1010380000000000000000000000000000000000A8
:101048000000000000000000000000000000000098
:101058000000000000000000000000000000000088
:101068000000000000000000000000000000000078
:101078000000000000000000000000000000000068
:101088000000000000000000000000000000000058
:101098000000000000000000000000000000000048
:1010A8000000000000000000010000000000000037
:1010B8000E33CDAB34126DE6ECDE05000B000000FC
:1010C8000000000000000000000000000000000018
:1010D8000000000000000000000000000000000008
:1010E80000000000000000000000000000000000F8
:1010F80000000000000000000000000000000000E8
:1011080000000000000000000000000000000000D7
:1011180000000000000000000000000000000000C7
:1011280000000000000000000000000000000000B7
:1011380000000000000000000000000000000000A7
:101148000000000000000000000000000000000097
:101158000000000000000000000000000000000087
:101168000000000000000000000000000000000077
:101178000000000000000000000000000000000067
:101188000000000000000000000000000000000057
:101198000000000000000000000000000000000047
:1011A8000000000000000000000000000000000037
:1011B8000000000000000000000000000000000027
:1011C8000000000000000000000000000000000017
:1011D8000000000000000000000000000000000007
:1011E80000000000000000000000000000000000F7
:1011F80000000000000000000000000000000000E7
:1012080000000000000000000000000000000000D6
:1012180000000000000000000000000000000000C6
:1012280000000000000000000000000000000000B6
:1012380000000000000000000000000000000000A6
:101248000000000000000000000000000000000096
:101258000000000000000000000000000000000086
:101268000000000000000000000000000000000076
:101278000000000000000000000000000000000066
:101288000000000000000000000000000000000056
:101298000000000000000000000000000000000046
:1012A8000000000000000000000000000000000036
:1012B8000000000000000000000000000000000026
:1012C8000000000000000000000000000000000016
:1012D8000000000000000000000000000000000006
:1012E80000000000000000000000000000000000F6
:1012F80000000000000000000000000000000000E6
:1013080000000000000000000000000000000000D5
:1013180000000000000000000000000000000000C5
:1013280000000000000000000000000000000000B5
:1013380000000000000000000000000000000000A5
:101348000000000000000000000000000000000095
:101358000000000000000000000000000000000085
:101368000000000000000000000000000000000075
:101378000000000000000000000000000000000065
:101388000000000000000000000000000000000055
:101398000000000000000000000000000000000045
:1013A8000000000000000000000000000000000035
:1013B8000000000000000000000000000000000025
:1013C8000000000000000000000000000000000015
:1013D8000000000000000000000000000000000005
:1013E80000000000000000000000000000000000F5
:1013F80000000000000000000000000000000000E5
:1014080000000000000000000000000000000000D4
:1014180000000000000000000000000000000000C4
:081428000000000000000000BC
:101430000810008000000070000000100000002074
:040000058000000077 :040000058000000077
:00000001FF :00000001FF

2
simX/core.cpp
View File

@@ -640,7 +640,7 @@ Warp::Warp(Core *c, Word id) :
core(c), pc(0x80000000), interruptEnable(true), core(c), pc(0x80000000), interruptEnable(true),
supervisorMode(true), activeThreads(0), reg(0), pred(0), supervisorMode(true), activeThreads(0), reg(0), pred(0),
shadowReg(core->a.getNRegs()), shadowPReg(core->a.getNPRegs()), id(id), shadowReg(core->a.getNRegs()), shadowPReg(core->a.getNPRegs()), id(id),
spawned(false), steps(0), insts(0), loads(0), stores(0) spawned(false), steps(0), insts(0), loads(0), stores(0), VLEN(96)
{ {
D(3, "Creating a new thread with PC: " << hex << this->pc << '\n'); D(3, "Creating a new thread with PC: " << hex << this->pc << '\n');
/* Build the register file. */ /* Build the register file. */

92
simX/enc.cpp
View File

@@ -53,6 +53,8 @@ WordDecoder::WordDecoder(const ArchDef &arch) {
opcode_s = 7; opcode_s = 7;
reg_s = 5; reg_s = 5;
func3_s = 3; func3_s = 3;
mop_s = 3;
vmask_s = 1;
shift_opcode = 0; shift_opcode = 0;
shift_rd = opcode_s; shift_rd = opcode_s;
@@ -63,6 +65,13 @@ WordDecoder::WordDecoder(const ArchDef &arch) {
shift_j_u_immed = opcode_s + reg_s; shift_j_u_immed = opcode_s + reg_s;
shift_s_b_immed = opcode_s + reg_s + func3_s + reg_s + reg_s; shift_s_b_immed = opcode_s + reg_s + func3_s + reg_s + reg_s;
shift_i_immed = opcode_s + reg_s + func3_s + reg_s; shift_i_immed = opcode_s + reg_s + func3_s + reg_s;
shift_vset_immed = opcode_s + reg_s + func3_s + reg_s;
shift_vmask = opcode_s + reg_s + func3_s + reg_s + reg_s;
shift_vmop = opcode_s + reg_s + func3_s + reg_s + reg_s + vmask_s;
shift_vnf = opcode_s + reg_s + func3_s + reg_s + reg_s + vmask_s + mop_s;
shift_func6 = opcode_s + reg_s + func3_s + reg_s + reg_s + 1;
shift_vset = opcode_s + reg_s + func3_s + reg_s + reg_s + 6;
reg_mask = 0x1f; reg_mask = 0x1f;
func3_mask = 0x7; func3_mask = 0x7;
@@ -73,6 +82,8 @@ WordDecoder::WordDecoder(const ArchDef &arch) {
b_immed_mask = 0x1fff; b_immed_mask = 0x1fff;
u_immed_mask = 0xfffff; u_immed_mask = 0xfffff;
j_immed_mask = 0xfffff; j_immed_mask = 0xfffff;
v_immed_mask = 0x7ff;
func6_mask = 0x3f;
} }
@@ -208,14 +219,91 @@ Instruction *WordDecoder::decode(const std::vector<Byte> &v, Size &idx, trace_in
imeed = 0 | (bits_10_1 << 1) | (bit_11 << 11) | (bits_19_12 << 12) | (bit_20 << 20); imeed = 0 | (bits_10_1 << 1) | (bit_11 << 11) | (bits_19_12 << 12) | (bit_20 << 20);
inst.setSrcImm(signExt(imeed, 21, j_immed_mask)); inst.setSrcImm(signExt(imeed, 20, j_immed_mask));
usedImm = true; usedImm = true;
trace_inst->valid_inst = true; trace_inst->valid_inst = true;
trace_inst->rd = ((code>>shift_rd) & reg_mask); trace_inst->rd = ((code>>shift_rd) & reg_mask);
break; break;
defualt:
case InstType::V_TYPE:
cout << "Entered here: instr type = vector" << op << endl;
switch(op) {
case Opcode::VSET_ARITH: //TODO: arithmetic ops
inst.setDestReg((code>>shift_rd) & reg_mask);
inst.setSrcReg((code>>shift_rs1) & reg_mask);
func3 = (code>>shift_func3) & func3_mask;
inst.setFunc3 (func3);
cout << "Entered here: instr type = vector" << endl;
if(func3 == 7) {
cout << "Entered here: imm instr";
inst.setVsetImm(!(code>>shift_vset));
if(inst.getVsetImm()) {
Word immed = (code>>shift_rs2) & v_immed_mask;
D(3, "immed" << immed);
inst.setSrcImm(immed); //TODO
inst.setvlmul(immed & 0x3);
D(3, "lmul " << (immed & 0x3));
inst.setvediv((immed>>4) & 0x3);
D(3, "ediv " << ((immed>>4) & 0x3));
inst.setvsew((immed>>2) & 0x3);
D(3, "sew " << ((immed>>2) & 0x3));
}
else {
inst.setSrcReg((code>>shift_rs2) & reg_mask);
trace_inst->rs2 = ((code>>shift_rs2) & reg_mask);
}
trace_inst->valid_inst = true;
trace_inst->rs1 = ((code>>shift_rs1) & reg_mask);
trace_inst->rd = ((code>>shift_rd) & reg_mask);
} else {
inst.setSrcReg((code>>shift_rs2) & reg_mask);
inst.setVmask((code>>shift_vmask) & 0x1);
inst.setFunc6((code>>shift_func6) & func6_mask);
trace_inst->valid_inst = true;
trace_inst->rs1 = ((code>>shift_rs1) & reg_mask);
trace_inst->rs2 = ((code>>shift_rs2) & reg_mask);
trace_inst->rd = ((code>>shift_rd) & reg_mask);
}
break;
case Opcode::VL:
D(3, "vector load instr");
inst.setDestReg((code>>shift_rd) & reg_mask);
inst.setSrcReg((code>>shift_rs1) & reg_mask);
inst.setVlsWidth((code>>shift_func3) & func3_mask);
inst.setSrcReg((code>>shift_rs2) & reg_mask);
inst.setVmask((code>>shift_vmask));
inst.setVmop((code>>shift_vmop) && func3_mask);
inst.setVnf((code>>shift_vnf) && func3_mask);
trace_inst->valid_inst = true;
trace_inst->rs1 = ((code>>shift_rs1) & reg_mask);
trace_inst->rd = ((code>>shift_rd) & reg_mask);
trace_inst->rs2 = ((code>>shift_rs2) & reg_mask);
break;
case Opcode::VS:
inst.setVs3((code>>shift_rd) & reg_mask);
inst.setSrcReg((code>>shift_rs1) & reg_mask);
inst.setVlsWidth((code>>shift_func3) & func3_mask);
inst.setSrcReg((code>>shift_rs2) & reg_mask);
inst.setVmask((code>>shift_vmask));
inst.setVmop((code>>shift_vmop) && func3_mask);
inst.setVnf((code>>shift_vnf) && func3_mask);
trace_inst->valid_inst = true;
trace_inst->rs1 = ((code>>shift_rs1) & reg_mask);
trace_inst->rd = ((code>>shift_rd) & reg_mask);
trace_inst->rs2 = ((code>>shift_rs2) & reg_mask);
break;
}
break;
default:
cout << "Unrecognized argument class in word decoder.\n"; cout << "Unrecognized argument class in word decoder.\n";
exit(1); exit(1);
} }

20
simX/include/core.h
View File

@@ -37,6 +37,8 @@ namespace Harp {
public: public:
Reg(): cpuId(0), regNum(0), val(0) {} Reg(): cpuId(0), regNum(0), val(0) {}
Reg(Word c, Word n): cpuId(c), regNum(n), val(0) {} Reg(Word c, Word n): cpuId(c), regNum(n), val(0) {}
Reg(Word c, Word n, T v): cpuId(c), regNum(n), val(v) {}
Reg &operator=(T r) { if (regNum) {val = r; doWrite();} return *this; } Reg &operator=(T r) { if (regNum) {val = r; doWrite();} return *this; }
@@ -47,9 +49,10 @@ namespace Harp {
val &= mask; val &= mask;
} }
T val;
private: private:
Word cpuId, regNum; Word cpuId, regNum;
T val; // T val;
#ifdef EMU_INSTRUMENTATION #ifdef EMU_INSTRUMENTATION
/* Access size here is 8, representing the register size of 64-bit cores. */ /* Access size here is 8, representing the register size of 64-bit cores. */
@@ -86,6 +89,14 @@ namespace Harp {
Word pc; Word pc;
}; };
struct vtype
{
int vill;
int vediv;
int vsew;
int vlmul;
};
class Warp; class Warp;
class Core { class Core {
@@ -172,6 +183,13 @@ namespace Harp {
std::vector<Word> shadowReg; std::vector<Word> shadowReg;
std::vector<bool> shadowPReg; std::vector<bool> shadowPReg;
//Vector CSR
struct vtype vtype; //both of them are XLEN WIDE
int vl; //both of them are XLEN WIDE
Word VLEN; //Total vector length
std::vector<std::vector<Reg<char*>>> vreg; // 32 vector registers
bool interruptEnable, shadowInterruptEnable, supervisorMode, bool interruptEnable, shadowInterruptEnable, supervisorMode,
shadowSupervisorMode, spawned; shadowSupervisorMode, spawned;

4
simX/include/debug.h
View File

@@ -5,14 +5,14 @@
#define __DEBUG_H #define __DEBUG_H
// #define USE_DEBUG 9 // #define USE_DEBUG 9
#define USE_DEBUG -1 #define USE_DEBUG 3
#ifdef USE_DEBUG #ifdef USE_DEBUG
#include <iostream> #include <iostream>
#define D(lvl, x) do { \ #define D(lvl, x) do { \
using namespace std; \ using namespace std; \
if ((lvl) <= USE_DEBUG) { \ if ((lvl) == USE_DEBUG) { \
cout << "DEBUG " << __FILE__ << ':' << dec << __LINE__ << ": " \ cout << "DEBUG " << __FILE__ << ':' << dec << __LINE__ << ": " \
<< x << endl; \ << x << endl; \
} \ } \

6
simX/include/enc.h
View File

@@ -60,11 +60,15 @@ namespace Harp {
Size inst_s, opcode_s, reg_s, func3_s; Size inst_s, opcode_s, reg_s, func3_s;
Size shift_opcode, shift_rd, shift_rs1, shift_rs2, shift_func3, shift_func7; Size shift_opcode, shift_rd, shift_rs1, shift_rs2, shift_func3, shift_func7;
Size shift_j_u_immed, shift_s_b_immed, shift_i_immed; Size shift_j_u_immed, shift_s_b_immed, shift_i_immed;
//Vector
Size shift_vset, shift_vset_immed, shift_vmask, shift_vmop, shift_vnf, shift_func6;
Size vmask_s, mop_s;
Word reg_mask, func3_mask, func7_mask, opcode_mask, i_immed_mask, Word reg_mask, func3_mask, func7_mask, opcode_mask, i_immed_mask,
s_immed_mask, b_immed_mask, u_immed_mask, j_immed_mask; s_immed_mask, b_immed_mask, u_immed_mask, j_immed_mask, v_immed_mask, func6_mask;
}; };

2
simX/include/harpfloat.h
View File

@@ -81,7 +81,7 @@ namespace Harp {
bool sign(d < 0); bool sign(d < 0);
bool inf(isinf(d)), zero(d == 0.0); bool inf(std::isinf(d)), zero(d == 0.0);
int exp; int exp;
if (!inf && !zero) exp = floor(log2(fabs(d))); if (!inf && !zero) exp = floor(log2(fabs(d)));

37
simX/include/instruction.h
View File

@@ -6,6 +6,7 @@
#include <map> #include <map>
#include <iostream> #include <iostream>
#include <math.h>
#include "types.h" #include "types.h"
#include "trace.h" #include "trace.h"
@@ -29,10 +30,13 @@ namespace Harp {
TRAP = 0x7f, TRAP = 0x7f,
FENCE = 0x0f, FENCE = 0x0f,
PJ_INST = 0x7b, PJ_INST = 0x7b,
GPGPU = 0x6b GPGPU = 0x6b,
VSET_ARITH = 0x57,
VL = 0x7,
VS = 0x27,
}; };
enum InstType { N_TYPE, R_TYPE, I_TYPE, S_TYPE, B_TYPE, U_TYPE, J_TYPE}; enum InstType { N_TYPE, R_TYPE, I_TYPE, S_TYPE, B_TYPE, U_TYPE, J_TYPE, V_TYPE};
// We build a table of instruction information out of this. // We build a table of instruction information out of this.
struct InstTableEntry_t { struct InstTableEntry_t {
@@ -58,7 +62,10 @@ namespace Harp {
{Opcode::TRAP, {"TRAP" , true , false, false, false, InstType::I_TYPE }}, {Opcode::TRAP, {"TRAP" , true , false, false, false, InstType::I_TYPE }},
{Opcode::FENCE, {"fence" , true , false, false, false, InstType::I_TYPE }}, {Opcode::FENCE, {"fence" , true , false, false, false, InstType::I_TYPE }},
{Opcode::PJ_INST, {"pred j", true , false, false, false, InstType::R_TYPE }}, {Opcode::PJ_INST, {"pred j", true , false, false, false, InstType::R_TYPE }},
{Opcode::GPGPU, {"gpgpu" , false, false, false, false, InstType::R_TYPE }} {Opcode::GPGPU, {"gpgpu" , false, false, false, false, InstType::R_TYPE }},
{Opcode::VSET_ARITH, {"vsetvl" , false, false, false, false, InstType::V_TYPE }},
{Opcode::VL, {"vl" , false, false, false, false, InstType::V_TYPE }},
{Opcode::VS, {"vs" , false, false, false, false, InstType::V_TYPE }}
}; };
static const Size MAX_REG_SOURCES(3); static const Size MAX_REG_SOURCES(3);
@@ -94,6 +101,16 @@ namespace Harp {
Word *setSrcImm () { immsrcPresent = true; immsrc = 0xa5; return &immsrc;} Word *setSrcImm () { immsrcPresent = true; immsrc = 0xa5; return &immsrc;}
void setSrcImm (Word srcImm) { immsrcPresent = true; immsrc = srcImm; } void setSrcImm (Word srcImm) { immsrcPresent = true; immsrc = srcImm; }
void setImmRef (Ref &r) { refLiteral = &r; } void setImmRef (Ref &r) { refLiteral = &r; }
void setVsetImm (Word vset_imm) { if(vset_imm) vsetImm = true; else vsetImm = false; }
void setVlsWidth (Word width) { vlsWidth = width; }
void setVmop( Word mop) { vMop = mop; }
void setVnf(Word nf) { vNf = nf; }
void setVmask(Word mask) { vmask = mask; }
void setVs3(Word vs) { vs3 = vs; }
void setvlmul(Word lmul) { vlmul = pow(2, lmul); }
void setvsew(Word sew) { vsew = pow(2, 3+sew); }
void setvediv(Word ediv) { vediv = pow(2,ediv); }
void setFunc6(Word func6) { this->func6 = func6; }
/* Getters used by encoders. */ /* Getters used by encoders. */
Opcode getOpcode() const { return op; } Opcode getOpcode() const { return op; }
@@ -111,6 +128,16 @@ namespace Harp {
Word getImm() const { return immsrc; } Word getImm() const { return immsrc; }
bool hasRefLiteral() const { return refLiteral != NULL; } bool hasRefLiteral() const { return refLiteral != NULL; }
Ref *getRefLiteral() const { return refLiteral; } Ref *getRefLiteral() const { return refLiteral; }
bool getVsetImm() const { return vsetImm; }
Word getVlsWidth() const { return vlsWidth; }
Word getVmop() const { return vMop; }
Word getvNf() const { return vNf; }
bool getVmask() const { return vmask; }
Word getVs3() const { return vs3; }
Word getvlmul() const { return vlmul; }
Word getvsew() const { return vsew; }
Word getvediv() const { return vediv; }
/* Getters used as table lookup. */ /* Getters used as table lookup. */
bool hasRelImm() const { return (*(instTable.find(op))).second.relAddress; } bool hasRelImm() const { return (*(instTable.find(op))).second.relAddress; }
@@ -129,6 +156,10 @@ namespace Harp {
RegNum rdest, pdest; RegNum rdest, pdest;
Ref *refLiteral; Ref *refLiteral;
//Vector
bool vsetImm, vmask;
Word vlsWidth, vMop, vNf, vs3, vlmul, vsew, vediv, func6;
public: public:

914
simX/instruction.cpp
View File

@@ -358,12 +358,14 @@ void Instruction::executeOn(Warp &c, trace_inst_t * trace_inst) {
} }
bool is_vec = false;
Size nextActiveThreads = c.activeThreads; Size nextActiveThreads = c.activeThreads;
Size wordSz = c.core->a.getWordSize(); Size wordSz = c.core->a.getWordSize();
Word nextPc = c.pc; Word nextPc = c.pc;
Word VLMAX;
c.memAccesses.clear(); c.memAccesses.clear();
@@ -1085,6 +1087,918 @@ void Instruction::executeOn(Warp &c, trace_inst_t * trace_inst) {
cout << "ERROR: UNSUPPORTED GPGPU INSTRUCTION " << *this << "\n"; cout << "ERROR: UNSUPPORTED GPGPU INSTRUCTION " << *this << "\n";
} }
break; break;
case VSET_ARITH:
D(3,"VSET_ARITH");
is_vec = true;
switch(func3) {
case 0: // vector-vector
switch(func6)
{
case 0:
{
is_vec = true;
D(3, "Addition " << rsrc[0] << " " << rsrc[1] << " Dest:" << rdest);
vector<Reg<char *>> vr1 = c.vreg[rsrc[0]];
vector<Reg<char *>> vr2 = c.vreg[rsrc[1]];
vector<Reg<char *>> vd = c.vreg[rdest];
vector<Reg<char *>> mask = c.vreg[0];
if (c.vtype.vsew == 8)
{
for (uint8_t i = 0; i < c.vl; i++)
{
uint8_t *mask_ptr = (uint8_t*) mask[i].val;
uint8_t value = (*mask_ptr & 0x1);
if(vmask || (!vmask && value)){
uint8_t * first_ptr = (uint8_t *) vr1[i].val;
uint8_t * second_ptr = (uint8_t *) vr2[i].val;
uint8_t result = *first_ptr + *second_ptr;
cout << "Adding " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
uint8_t * result_ptr = (uint8_t *) vd[i].val;
*result_ptr = result;
}
}
} else if (c.vtype.vsew == 16)
{
for (uint16_t i = 0; i < c.vl; i++)
{
uint16_t *mask_ptr = (uint16_t*) mask[i].val;
uint16_t value = (*mask_ptr & 0x1);
if(vmask || (!vmask && value)){
uint16_t * first_ptr = (uint16_t *) vr1[i].val;
uint16_t * second_ptr = (uint16_t *) vr2[i].val;
uint16_t result = *first_ptr + *second_ptr;
cout << "Adding " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
uint16_t * result_ptr = (uint16_t *) vd[i].val;
*result_ptr = result;
}
}
} else if (c.vtype.vsew == 32)
{
cout << "Doing 32 bit vector addition\n";
for (Word i = 0; i < c.vl; i++)
{
int *mask_ptr = (int*) mask[i].val;
int value = (*mask_ptr & 0x1);
if(vmask || (!vmask && value)){
int * first_ptr = (int *) vr1[i].val;
int * second_ptr = (int *) vr2[i].val;
int result = *first_ptr + *second_ptr;
cout << "Adding " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
int * result_ptr = (int *) vd[i].val;
*result_ptr = result;
}
}
}
D(3, "Vector Register state after addition:");
for(int i=0; i < c.vreg.size(); i++)
for(int j=0; j< c.vreg[0].size(); j++)
{
if (c.vtype.vsew == 8)
{
uint8_t * ptr_val = (uint8_t *) c.vreg[i][j].val;
std::cout << "reg[" << i << "][" << j << "] = " << *ptr_val << std::endl;
} else if (c.vtype.vsew == 16)
{
uint16_t * ptr_val = (uint16_t *) c.vreg[i][j].val;
std::cout << "reg[" << i << "][" << j << "] = " << *ptr_val << std::endl;
} else if (c.vtype.vsew == 32)
{
uint32_t * ptr_val = (uint32_t *) c.vreg[i][j].val;
std::cout << "reg[" << i << "][" << j << "] = " << *ptr_val << std::endl;
}
}
}
break;
case 24: //vmseq
{
vector<Reg<char *>> vr1 = c.vreg[rsrc[0]];
vector<Reg<char *>> vr2 = c.vreg[rsrc[1]];
vector<Reg<char *>> vd = c.vreg[rdest];
if(c.vtype.vsew == 8){
for(uint8_t i = 0; i < c.vl; i++){
uint8_t *first_ptr = (uint8_t *)vr1[i].val;
uint8_t *second_ptr = (uint8_t *)vr2[i].val;
uint8_t result = (*first_ptr == *second_ptr) ? 1 : 0;
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
uint8_t * result_ptr = (uint8_t *) vd[i].val;
*result_ptr = result;
}
} else if(c.vtype.vsew == 16) {
for(uint16_t i = 0; i < c.vl; i++){
uint16_t *first_ptr = (uint16_t *)vr1[i].val;
uint16_t *second_ptr = (uint16_t *)vr2[i].val;
uint16_t result = (*first_ptr == *second_ptr) ? 1 : 0;
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
uint16_t * result_ptr = (uint16_t *) vd[i].val;
*result_ptr = result;
}
} else if(c.vtype.vsew == 32) {
for(uint32_t i = 0; i < c.vl; i++){
uint32_t *first_ptr = (uint32_t *)vr1[i].val;
uint32_t *second_ptr = (uint32_t *)vr2[i].val;
uint32_t result = (*first_ptr == *second_ptr) ? 1 : 0;
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
uint32_t * result_ptr = (uint32_t *) vd[i].val;
*result_ptr = result;
}
}
}
break;
case 25: //vmsne
{
vector<Reg<char *>> vr1 = c.vreg[rsrc[0]];
vector<Reg<char *>> vr2 = c.vreg[rsrc[1]];
vector<Reg<char *>> vd = c.vreg[rdest];
if(c.vtype.vsew == 8){
for(uint8_t i = 0; i < c.vl; i++){
uint8_t *first_ptr = (uint8_t *)vr1[i].val;
uint8_t *second_ptr = (uint8_t *)vr2[i].val;
uint8_t result = (*first_ptr != *second_ptr) ? 1 : 0;
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
uint8_t * result_ptr = (uint8_t *) vd[i].val;
*result_ptr = result;
}
} else if(c.vtype.vsew == 16) {
for(uint16_t i = 0; i < c.vl; i++){
uint16_t *first_ptr = (uint16_t *)vr1[i].val;
uint16_t *second_ptr = (uint16_t *)vr2[i].val;
uint16_t result = (*first_ptr != *second_ptr) ? 1 : 0;
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
uint16_t * result_ptr = (uint16_t *) vd[i].val;
*result_ptr = result;
}
} else if(c.vtype.vsew == 32) {
for(uint32_t i = 0; i < c.vl; i++){
uint32_t *first_ptr = (uint32_t *)vr1[i].val;
uint32_t *second_ptr = (uint32_t *)vr2[i].val;
uint32_t result = (*first_ptr != *second_ptr) ? 1 : 0;
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
uint32_t * result_ptr = (uint32_t *) vd[i].val;
*result_ptr = result;
}
}
}
break;
case 26: //vmsltu
{
vector<Reg<char *>> vr1 = c.vreg[rsrc[0]];
vector<Reg<char *>> vr2 = c.vreg[rsrc[1]];
vector<Reg<char *>> vd = c.vreg[rdest];
if(c.vtype.vsew == 8){
for(uint8_t i = 0; i < c.vl; i++){
uint8_t *first_ptr = (uint8_t *)vr1[i].val;
uint8_t *second_ptr = (uint8_t *)vr2[i].val;
uint8_t result = (*first_ptr < *second_ptr) ? 1 : 0;
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
uint8_t * result_ptr = (uint8_t *) vd[i].val;
*result_ptr = result;
}
} else if(c.vtype.vsew == 16) {
for(uint16_t i = 0; i < c.vl; i++){
uint16_t *first_ptr = (uint16_t *)vr1[i].val;
uint16_t *second_ptr = (uint16_t *)vr2[i].val;
uint16_t result = (*first_ptr < *second_ptr) ? 1 : 0;
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
uint16_t * result_ptr = (uint16_t *) vd[i].val;
*result_ptr = result;
}
} else if(c.vtype.vsew == 32) {
for(uint32_t i = 0; i < c.vl; i++){
uint32_t *first_ptr = (uint32_t *)vr1[i].val;
uint32_t *second_ptr = (uint32_t *)vr2[i].val;
uint32_t result = (*first_ptr < *second_ptr) ? 1 : 0;
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
uint32_t * result_ptr = (uint32_t *) vd[i].val;
*result_ptr = result;
}
}
}
break;
case 27: //vmslt
{
vector<Reg<char *>> vr1 = c.vreg[rsrc[0]];
vector<Reg<char *>> vr2 = c.vreg[rsrc[1]];
vector<Reg<char *>> vd = c.vreg[rdest];
if(c.vtype.vsew == 8){
for(int8_t i = 0; i < c.vl; i++){
int8_t *first_ptr = (int8_t *)vr1[i].val;
int8_t *second_ptr = (int8_t *)vr2[i].val;
int8_t result = (*first_ptr < *second_ptr) ? 1 : 0;
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
int8_t * result_ptr = (int8_t *) vd[i].val;
*result_ptr = result;
}
} else if(c.vtype.vsew == 16) {
for(int16_t i = 0; i < c.vl; i++){
int16_t *first_ptr = (int16_t *)vr1[i].val;
int16_t *second_ptr = (int16_t *)vr2[i].val;
int16_t result = (*first_ptr < *second_ptr) ? 1 : 0;
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
int16_t * result_ptr = (int16_t *) vd[i].val;
*result_ptr = result;
}
} else if(c.vtype.vsew == 32) {
for(int32_t i = 0; i < c.vl; i++){
int32_t *first_ptr = (int32_t *)vr1[i].val;
int32_t *second_ptr = (int32_t *)vr2[i].val;
int32_t result = (*first_ptr < *second_ptr) ? 1 : 0;
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
int32_t * result_ptr = (int32_t *) vd[i].val;
*result_ptr = result;
}
}
}
break;
case 28: //vmsleu
{
vector<Reg<char *>> vr1 = c.vreg[rsrc[0]];
vector<Reg<char *>> vr2 = c.vreg[rsrc[1]];
vector<Reg<char *>> vd = c.vreg[rdest];
if(c.vtype.vsew == 8){
for(uint8_t i = 0; i < c.vl; i++){
uint8_t *first_ptr = (uint8_t *)vr1[i].val;
uint8_t *second_ptr = (uint8_t *)vr2[i].val;
uint8_t result = (*first_ptr <= *second_ptr) ? 1 : 0;
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
uint8_t * result_ptr = (uint8_t *) vd[i].val;
*result_ptr = result;
}
} else if(c.vtype.vsew == 16) {
for(uint16_t i = 0; i < c.vl; i++){
uint16_t *first_ptr = (uint16_t *)vr1[i].val;
uint16_t *second_ptr = (uint16_t *)vr2[i].val;
uint16_t result = (*first_ptr <= *second_ptr) ? 1 : 0;
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
uint16_t * result_ptr = (uint16_t *) vd[i].val;
*result_ptr = result;
}
} else if(c.vtype.vsew == 32) {
for(uint32_t i = 0; i < c.vl; i++){
uint32_t *first_ptr = (uint32_t *)vr1[i].val;
uint32_t *second_ptr = (uint32_t *)vr2[i].val;
uint32_t result = (*first_ptr <= *second_ptr) ? 1 : 0;
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
uint32_t * result_ptr = (uint32_t *) vd[i].val;
*result_ptr = result;
}
}
}
break;
case 29: //vmsle
{
vector<Reg<char *>> vr1 = c.vreg[rsrc[0]];
vector<Reg<char *>> vr2 = c.vreg[rsrc[1]];
vector<Reg<char *>> vd = c.vreg[rdest];
if(c.vtype.vsew == 8){
for(int8_t i = 0; i < c.vl; i++){
int8_t *first_ptr = (int8_t *)vr1[i].val;
int8_t *second_ptr = (int8_t *)vr2[i].val;
int8_t result = (*first_ptr <= *second_ptr) ? 1 : 0;
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
int8_t * result_ptr = (int8_t *) vd[i].val;
*result_ptr = result;
}
} else if(c.vtype.vsew == 16) {
for(int16_t i = 0; i < c.vl; i++){
int16_t *first_ptr = (int16_t *)vr1[i].val;
int16_t *second_ptr = (int16_t *)vr2[i].val;
int16_t result = (*first_ptr <= *second_ptr) ? 1 : 0;
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
int16_t * result_ptr = (int16_t *) vd[i].val;
*result_ptr = result;
}
} else if(c.vtype.vsew == 32) {
for(int32_t i = 0; i < c.vl; i++){
int32_t *first_ptr = (int32_t *)vr1[i].val;
int32_t *second_ptr = (int32_t *)vr2[i].val;
int32_t result = (*first_ptr <= *second_ptr) ? 1 : 0;
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
int32_t * result_ptr = (int32_t *) vd[i].val;
*result_ptr = result;
}
}
}
break;
case 30: //vmsgtu
{
vector<Reg<char *>> vr1 = c.vreg[rsrc[0]];
vector<Reg<char *>> vr2 = c.vreg[rsrc[1]];
vector<Reg<char *>> vd = c.vreg[rdest];
if(c.vtype.vsew == 8){
for(uint8_t i = 0; i < c.vl; i++){
uint8_t *first_ptr = (uint8_t *)vr1[i].val;
uint8_t *second_ptr = (uint8_t *)vr2[i].val;
uint8_t result = (*first_ptr > *second_ptr) ? 1 : 0;
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
uint8_t * result_ptr = (uint8_t *) vd[i].val;
*result_ptr = result;
}
} else if(c.vtype.vsew == 16) {
for(uint16_t i = 0; i < c.vl; i++){
uint16_t *first_ptr = (uint16_t *)vr1[i].val;
uint16_t *second_ptr = (uint16_t *)vr2[i].val;
uint16_t result = (*first_ptr > *second_ptr) ? 1 : 0;
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
uint16_t * result_ptr = (uint16_t *) vd[i].val;
*result_ptr = result;
}
} else if(c.vtype.vsew == 32) {
for(uint32_t i = 0; i < c.vl; i++){
uint32_t *first_ptr = (uint32_t *)vr1[i].val;
uint32_t *second_ptr = (uint32_t *)vr2[i].val;
uint32_t result = (*first_ptr > *second_ptr) ? 1 : 0;
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
uint32_t * result_ptr = (uint32_t *) vd[i].val;
*result_ptr = result;
}
}
}
break;
case 31: //vmsgt
{
vector<Reg<char *>> vr1 = c.vreg[rsrc[0]];
vector<Reg<char *>> vr2 = c.vreg[rsrc[1]];
vector<Reg<char *>> vd = c.vreg[rdest];
if(c.vtype.vsew == 8){
for(int8_t i = 0; i < c.vl; i++){
int8_t *first_ptr = (int8_t *)vr1[i].val;
int8_t *second_ptr = (int8_t *)vr2[i].val;
int8_t result = (*first_ptr > *second_ptr) ? 1 : 0;
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
int8_t * result_ptr = (int8_t *) vd[i].val;
*result_ptr = result;
}
} else if(c.vtype.vsew == 16) {
for(int16_t i = 0; i < c.vl; i++){
int16_t *first_ptr = (int16_t *)vr1[i].val;
int16_t *second_ptr = (int16_t *)vr2[i].val;
int16_t result = (*first_ptr > *second_ptr) ? 1 : 0;
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
int16_t * result_ptr = (int16_t *) vd[i].val;
*result_ptr = result;
}
} else if(c.vtype.vsew == 32) {
for(int32_t i = 0; i < c.vl; i++){
int32_t *first_ptr = (int32_t *)vr1[i].val;
int32_t *second_ptr = (int32_t *)vr2[i].val;
int32_t result = (*first_ptr > *second_ptr) ? 1 : 0;
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
int32_t * result_ptr = (int32_t *) vd[i].val;
*result_ptr = result;
}
}
}
break;
}
break;
case 2:
{
switch(func6){
case 24: //vmandnot
{
D(3, "vmandnot");
vector<Reg<char *>> vr1 = c.vreg[rsrc[0]];
vector<Reg<char *>> vr2 = c.vreg[rsrc[1]];
vector<Reg<char *>> vd = c.vreg[rdest];
if(c.vtype.vsew == 8){
for(uint8_t i = 0; i < c.vl; i++){
uint8_t *first_ptr = (uint8_t *)vr1[i].val;
uint8_t *second_ptr = (uint8_t *)vr2[i].val;
uint8_t first_value = (*first_ptr & 0x1);
uint8_t second_value = (*second_ptr & 0x1);
uint8_t result = (first_value & !second_value);
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
uint8_t * result_ptr = (uint8_t *) vd[i].val;
*result_ptr = result;
}
} else if(c.vtype.vsew == 16) {
for(uint16_t i = 0; i < c.vl; i++){
uint16_t *first_ptr = (uint16_t *)vr1[i].val;
uint16_t *second_ptr = (uint16_t *)vr2[i].val;
uint16_t first_value = (*first_ptr & 0x1);
uint16_t second_value = (*second_ptr & 0x1);
uint16_t result = (first_value & !second_value);
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
uint16_t * result_ptr = (uint16_t *) vd[i].val;
*result_ptr = result;
}
} else if(c.vtype.vsew == 32) {
for(uint32_t i = 0; i < c.vl; i++){
uint32_t *first_ptr = (uint32_t *)vr1[i].val;
uint32_t *second_ptr = (uint32_t *)vr2[i].val;
uint32_t first_value = (*first_ptr & 0x1);
uint32_t second_value = (*second_ptr & 0x1);
uint32_t result = (first_value & !second_value);
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
uint32_t * result_ptr = (uint32_t *) vd[i].val;
*result_ptr = result;
}
}
}
break;
case 25: //vmand
{
D(3, "vmand");
vector<Reg<char *>> vr1 = c.vreg[rsrc[0]];
vector<Reg<char *>> vr2 = c.vreg[rsrc[1]];
vector<Reg<char *>> vd = c.vreg[rdest];
if(c.vtype.vsew == 8){
for(uint8_t i = 0; i < c.vl; i++){
uint8_t *first_ptr = (uint8_t *)vr1[i].val;
uint8_t *second_ptr = (uint8_t *)vr2[i].val;
uint8_t first_value = (*first_ptr & 0x1);
uint8_t second_value = (*second_ptr & 0x1);
uint8_t result = (first_value & second_value);
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
uint8_t * result_ptr = (uint8_t *) vd[i].val;
*result_ptr = result;
}
} else if(c.vtype.vsew == 16) {
for(uint16_t i = 0; i < c.vl; i++){
uint16_t *first_ptr = (uint16_t *)vr1[i].val;
uint16_t *second_ptr = (uint16_t *)vr2[i].val;
uint16_t first_value = (*first_ptr & 0x1);
uint16_t second_value = (*second_ptr & 0x1);
uint16_t result = (first_value & second_value);
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
uint16_t * result_ptr = (uint16_t *) vd[i].val;
*result_ptr = result;
}
} else if(c.vtype.vsew == 32) {
for(uint32_t i = 0; i < c.vl; i++){
uint32_t *first_ptr = (uint32_t *)vr1[i].val;
uint32_t *second_ptr = (uint32_t *)vr2[i].val;
uint32_t first_value = (*first_ptr & 0x1);
uint32_t second_value = (*second_ptr & 0x1);
uint32_t result = (first_value & second_value);
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
uint32_t * result_ptr = (uint32_t *) vd[i].val;
*result_ptr = result;
}
}
}
break;
case 26: //vmor
{
D(3, "vmor");
vector<Reg<char *>> vr1 = c.vreg[rsrc[0]];
vector<Reg<char *>> vr2 = c.vreg[rsrc[1]];
vector<Reg<char *>> vd = c.vreg[rdest];
if(c.vtype.vsew == 8){
for(uint8_t i = 0; i < c.vl; i++){
uint8_t *first_ptr = (uint8_t *)vr1[i].val;
uint8_t *second_ptr = (uint8_t *)vr2[i].val;
uint8_t first_value = (*first_ptr & 0x1);
uint8_t second_value = (*second_ptr & 0x1);
uint8_t result = (first_value | second_value);
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
uint8_t * result_ptr = (uint8_t *) vd[i].val;
*result_ptr = result;
}
} else if(c.vtype.vsew == 16) {
for(uint16_t i = 0; i < c.vl; i++){
uint16_t *first_ptr = (uint16_t *)vr1[i].val;
uint16_t *second_ptr = (uint16_t *)vr2[i].val;
uint16_t first_value = (*first_ptr & 0x1);
uint16_t second_value = (*second_ptr & 0x1);
uint16_t result = (first_value | second_value);
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
uint16_t * result_ptr = (uint16_t *) vd[i].val;
*result_ptr = result;
}
} else if(c.vtype.vsew == 32) {
for(uint32_t i = 0; i < c.vl; i++){
uint32_t *first_ptr = (uint32_t *)vr1[i].val;
uint32_t *second_ptr = (uint32_t *)vr2[i].val;
uint32_t first_value = (*first_ptr & 0x1);
uint32_t second_value = (*second_ptr & 0x1);
uint32_t result = (first_value | second_value);
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
uint32_t * result_ptr = (uint32_t *) vd[i].val;
*result_ptr = result;
}
}
}
break;
case 27: //vmxor
{
D(3, "vmxor");
vector<Reg<char *>> vr1 = c.vreg[rsrc[0]];
vector<Reg<char *>> vr2 = c.vreg[rsrc[1]];
vector<Reg<char *>> vd = c.vreg[rdest];
if(c.vtype.vsew == 8){
for(uint8_t i = 0; i < c.vl; i++){
uint8_t *first_ptr = (uint8_t *)vr1[i].val;
uint8_t *second_ptr = (uint8_t *)vr2[i].val;
uint8_t first_value = (*first_ptr & 0x1);
uint8_t second_value = (*second_ptr & 0x1);
uint8_t result = (first_value ^ second_value);
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
uint8_t * result_ptr = (uint8_t *) vd[i].val;
*result_ptr = result;
}
} else if(c.vtype.vsew == 16) {
for(uint16_t i = 0; i < c.vl; i++){
uint16_t *first_ptr = (uint16_t *)vr1[i].val;
uint16_t *second_ptr = (uint16_t *)vr2[i].val;
uint16_t first_value = (*first_ptr & 0x1);
uint16_t second_value = (*second_ptr & 0x1);
uint16_t result = (first_value ^ second_value);
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
uint16_t * result_ptr = (uint16_t *) vd[i].val;
*result_ptr = result;
}
} else if(c.vtype.vsew == 32) {
for(uint32_t i = 0; i < c.vl; i++){
uint32_t *first_ptr = (uint32_t *)vr1[i].val;
uint32_t *second_ptr = (uint32_t *)vr2[i].val;
uint32_t first_value = (*first_ptr & 0x1);
uint32_t second_value = (*second_ptr & 0x1);
uint32_t result = (first_value ^ second_value);
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
uint32_t * result_ptr = (uint32_t *) vd[i].val;
*result_ptr = result;
}
}
}
break;
case 28: //vmornot
{
D(3, "vmornot");
vector<Reg<char *>> vr1 = c.vreg[rsrc[0]];
vector<Reg<char *>> vr2 = c.vreg[rsrc[1]];
vector<Reg<char *>> vd = c.vreg[rdest];
if(c.vtype.vsew == 8){
for(uint8_t i = 0; i < c.vl; i++){
uint8_t *first_ptr = (uint8_t *)vr1[i].val;
uint8_t *second_ptr = (uint8_t *)vr2[i].val;
uint8_t first_value = (*first_ptr & 0x1);
uint8_t second_value = (*second_ptr & 0x1);
uint8_t result = (first_value | !second_value);
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
uint8_t * result_ptr = (uint8_t *) vd[i].val;
*result_ptr = result;
}
} else if(c.vtype.vsew == 16) {
for(uint16_t i = 0; i < c.vl; i++){
uint16_t *first_ptr = (uint16_t *)vr1[i].val;
uint16_t *second_ptr = (uint16_t *)vr2[i].val;
uint16_t first_value = (*first_ptr & 0x1);
uint16_t second_value = (*second_ptr & 0x1);
uint16_t result = (first_value | !second_value);
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
uint16_t * result_ptr = (uint16_t *) vd[i].val;
*result_ptr = result;
}
} else if(c.vtype.vsew == 32) {
for(uint32_t i = 0; i < c.vl; i++){
uint32_t *first_ptr = (uint32_t *)vr1[i].val;
uint32_t *second_ptr = (uint32_t *)vr2[i].val;
uint32_t first_value = (*first_ptr & 0x1);
uint32_t second_value = (*second_ptr & 0x1);
uint32_t result = (first_value | !second_value);
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
uint32_t * result_ptr = (uint32_t *) vd[i].val;
*result_ptr = result;
}
}
}
break;
case 29: //vmnand
{
D(3, "vmnand");
vector<Reg<char *>> vr1 = c.vreg[rsrc[0]];
vector<Reg<char *>> vr2 = c.vreg[rsrc[1]];
vector<Reg<char *>> vd = c.vreg[rdest];
if(c.vtype.vsew == 8){
for(uint8_t i = 0; i < c.vl; i++){
uint8_t *first_ptr = (uint8_t *)vr1[i].val;
uint8_t *second_ptr = (uint8_t *)vr2[i].val;
uint8_t first_value = (*first_ptr & 0x1);
uint8_t second_value = (*second_ptr & 0x1);
uint8_t result = !(first_value & second_value);
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
uint8_t * result_ptr = (uint8_t *) vd[i].val;
*result_ptr = result;
}
} else if(c.vtype.vsew == 16) {
for(uint16_t i = 0; i < c.vl; i++){
uint16_t *first_ptr = (uint16_t *)vr1[i].val;
uint16_t *second_ptr = (uint16_t *)vr2[i].val;
uint16_t first_value = (*first_ptr & 0x1);
uint16_t second_value = (*second_ptr & 0x1);
uint16_t result = !(first_value & second_value);
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
uint16_t * result_ptr = (uint16_t *) vd[i].val;
*result_ptr = result;
}
} else if(c.vtype.vsew == 32) {
for(uint32_t i = 0; i < c.vl; i++){
uint32_t *first_ptr = (uint32_t *)vr1[i].val;
uint32_t *second_ptr = (uint32_t *)vr2[i].val;
uint32_t first_value = (*first_ptr & 0x1);
uint32_t second_value = (*second_ptr & 0x1);
uint32_t result = !(first_value & second_value);
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
uint32_t * result_ptr = (uint32_t *) vd[i].val;
*result_ptr = result;
}
}
}
break;
case 30: //vmnor
{
D(3, "vmnor");
vector<Reg<char *>> vr1 = c.vreg[rsrc[0]];
vector<Reg<char *>> vr2 = c.vreg[rsrc[1]];
vector<Reg<char *>> vd = c.vreg[rdest];
if(c.vtype.vsew == 8){
for(uint8_t i = 0; i < c.vl; i++){
uint8_t *first_ptr = (uint8_t *)vr1[i].val;
uint8_t *second_ptr = (uint8_t *)vr2[i].val;
uint8_t first_value = (*first_ptr & 0x1);
uint8_t second_value = (*second_ptr & 0x1);
uint8_t result = !(first_value | second_value);
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
uint8_t * result_ptr = (uint8_t *) vd[i].val;
*result_ptr = result;
}
} else if(c.vtype.vsew == 16) {
for(uint16_t i = 0; i < c.vl; i++){
uint16_t *first_ptr = (uint16_t *)vr1[i].val;
uint16_t *second_ptr = (uint16_t *)vr2[i].val;
uint16_t first_value = (*first_ptr & 0x1);
uint16_t second_value = (*second_ptr & 0x1);
uint16_t result = !(first_value | second_value);
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
uint16_t * result_ptr = (uint16_t *) vd[i].val;
*result_ptr = result;
}
} else if(c.vtype.vsew == 32) {
for(uint32_t i = 0; i < c.vl; i++){
uint32_t *first_ptr = (uint32_t *)vr1[i].val;
uint32_t *second_ptr = (uint32_t *)vr2[i].val;
uint32_t first_value = (*first_ptr & 0x1);
uint32_t second_value = (*second_ptr & 0x1);
uint32_t result = !(first_value | second_value);
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
uint32_t * result_ptr = (uint32_t *) vd[i].val;
*result_ptr = result;
}
}
}
break;
case 31: //vmxnor
{
D(3, "vmxnor");
vector<Reg<char *>> vr1 = c.vreg[rsrc[0]];
vector<Reg<char *>> vr2 = c.vreg[rsrc[1]];
vector<Reg<char *>> vd = c.vreg[rdest];
if(c.vtype.vsew == 8){
for(uint8_t i = 0; i < c.vl; i++){
uint8_t *first_ptr = (uint8_t *)vr1[i].val;
uint8_t *second_ptr = (uint8_t *)vr2[i].val;
uint8_t first_value = (*first_ptr & 0x1);
uint8_t second_value = (*second_ptr & 0x1);
uint8_t result = !(first_value ^ second_value);
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
uint8_t * result_ptr = (uint8_t *) vd[i].val;
*result_ptr = result;
}
} else if(c.vtype.vsew == 16) {
for(uint16_t i = 0; i < c.vl; i++){
uint16_t *first_ptr = (uint16_t *)vr1[i].val;
uint16_t *second_ptr = (uint16_t *)vr2[i].val;
uint16_t first_value = (*first_ptr & 0x1);
uint16_t second_value = (*second_ptr & 0x1);
uint16_t result = !(first_value ^ second_value);
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
uint16_t * result_ptr = (uint16_t *) vd[i].val;
*result_ptr = result;
}
} else if(c.vtype.vsew == 32) {
for(uint32_t i = 0; i < c.vl; i++){
uint32_t *first_ptr = (uint32_t *)vr1[i].val;
uint32_t *second_ptr = (uint32_t *)vr2[i].val;
uint32_t first_value = (*first_ptr & 0x1);
uint32_t second_value = (*second_ptr & 0x1);
uint32_t result = !(first_value ^ second_value);
cout << "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result << '\n';
uint32_t * result_ptr = (uint32_t *) vd[i].val;
*result_ptr = result;
}
}
}
break;
}
}
break;
case 7:
{
is_vec = true;
c.vtype.vill = 0; //TODO
c.vtype.vediv = vediv;
c.vtype.vsew = vsew;
c.vtype.vlmul = vlmul;
D(3, "lmul:" << vlmul << " sew:" << vsew << " ediv: " << vediv);
Word VLMAX = (vlmul * c.VLEN)/vsew;
if(reg[rsrc[0]] <= VLMAX){
c.vl = reg[rsrc[0]];
}
if(reg[rsrc[0]] >= (2*VLMAX)) {
c.vl = VLMAX;
}
reg[rdest] = c.vl;
D(3, "VL:" << reg[rdest]);
Word regNum(0);
for (int j = 0; j < 32; j++)
{
c.vreg.push_back(vector<Reg<char*>>());
for (int i = 0; i < (c.VLEN/vsew); ++i)
{
int * elem_ptr = (int *) malloc(vsew/8);
for (int f = 0; f < (vsew/32); f++) elem_ptr[f] = 0;
c.vreg[j].push_back(Reg<char*>(c.id, regNum++, (char *) elem_ptr));
}
}
}
break;
}
break;
case VL:
{
is_vec = true;
D(3, "Executing vector load");
VLMAX = (c.vtype.vlmul * c.VLEN)/c.vtype.vsew;
D(3, "lmul: " << c.vtype.vlmul << " VLEN:" << c.VLEN << "sew: " << c.vtype.vsew);
D(3, "src: " << rsrc[0] << " " << reg[rsrc[0]]);
D(3, "dest" << rdest);
D(3, "width" << vlsWidth);
vector<Reg<char *>> vd = c.vreg[rdest];
switch(vlsWidth) {
case 6: //load word and unit strided (not checking for unit stride)
for(Word i = 0; i < c.vl; i++) {
memAddr = ((reg[rsrc[0]]) & 0xFFFFFFFC) + i*c.vtype.vsew;
data_read = c.core->mem.read(memAddr, c.supervisorMode);
D(3, "Data read " << data_read);
int * result_ptr = (int *) vd[i].val;
*result_ptr = data_read;
//trace_inst->is_lw = true;
//trace_inst->mem_addresses[t] = memAddr;
}
for(Word i = c.vl; i < VLMAX; i++){
int * result_ptr = (int *) vd[i].val;
*result_ptr = 0;
}
D(3, "Vector Register state after addition:");
for(int i=0; i < c.vreg.size(); i++)
for(int j=0; j< c.vreg[0].size(); j++)
{
if (c.vtype.vsew == 8)
{
uint8_t * ptr_val = (uint8_t *) c.vreg[i][j].val;
std::cout << "reg[" << i << "][" << j << "] = " << *ptr_val << std::endl;
} else if (c.vtype.vsew == 16)
{
uint16_t * ptr_val = (uint16_t *) c.vreg[i][j].val;
std::cout << "reg[" << i << "][" << j << "] = " << *ptr_val << std::endl;
} else if (c.vtype.vsew == 32)
{
uint32_t * ptr_val = (uint32_t *) c.vreg[i][j].val;
std::cout << "reg[" << i << "][" << j << "] = " << *ptr_val << std::endl;
}
}
break;
}
}
break;
case VS:
is_vec = true;
VLMAX = (c.vtype.vlmul * c.VLEN)/c.vtype.vsew;
for(Word i = 0; i < c.vl; i++) {
++c.stores;
memAddr = reg[rsrc[0]] + i*c.vtype.vsew;
std::cout << "STORE MEM ADDRESS: " << std::hex << memAddr << "\n";
//trace_inst->is_sw = true;
//trace_inst->mem_addresses[t] = memAddr;
switch (vlsWidth)
{
case 6: //store word and unit strided (not checking for unit stride)
{
uint32_t * ptr_val = (uint32_t *) c.vreg[vs3][i].val;
c.core->mem.write(memAddr, *ptr_val, c.supervisorMode, 4);
D(3, "store: " << memAddr << " value:" << *ptr_val);
}
break;
default:
cout << "ERROR: UNSUPPORTED S INST\n";
exit(1);
}
c.memAccesses.push_back(Warp::MemAccess(true, memAddr));
}
break;
default: default:
cout << "pc: " << hex << (c.pc-4) << "\n"; cout << "pc: " << hex << (c.pc-4) << "\n";
cout << "aERROR: Unsupported instruction: " << *this << "\n" << flush; cout << "aERROR: Unsupported instruction: " << *this << "\n" << flush;

2
simX/test_riscv.sh
View File

@@ -3,4 +3,4 @@ echo start > results.txt
# echo ../kernel/vortex_test.hex # echo ../kernel/vortex_test.hex
make make
printf "Fasten your seatbelts ladies and gentelmen!!\n\n\n\n" printf "Fasten your seatbelts ladies and gentelmen!!\n\n\n\n"
cd obj_dir && ./Vcache_simX -E -a rv32i --core /home/fares/Desktop/Vortex/runtime/mains/simple/vx_simple_main.hex -s -b 1> emulator.debug cd obj_dir && ./Vcache_simX -E -a rv32i --core ../../runtime/mains/simple/vx_simple_main.hex -s -b 1> emulator.debug