OPAE rtl fixes
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@@ -8,12 +8,8 @@ module VX_back_end #(
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input wire schedule_delay,
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VX_cache_core_rsp_if dcache_rsp_if,
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VX_cache_core_req_if dcache_req_if,
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output wire mem_delay,
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output wire exec_delay,
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output wire gpr_stage_delay,
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VX_cache_core_rsp_if dcache_rsp_if,
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VX_jal_rsp_if jal_rsp_if,
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VX_branch_rsp_if branch_rsp_if,
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@@ -22,6 +18,10 @@ module VX_back_end #(
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VX_warp_ctl_if warp_ctl_if,
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output wire mem_delay,
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output wire exec_delay,
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output wire gpr_stage_delay,
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output wire ebreak
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);
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@@ -78,8 +78,8 @@ module VX_back_end #(
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.reset (reset),
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.lsu_req_if (lsu_req_if),
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.mem_wb_if (mem_wb_if),
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.dcache_rsp_if (dcache_rsp_if),
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.dcache_req_if (dcache_req_if),
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.dcache_rsp_if (dcache_rsp_if),
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.delay (mem_delay),
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.no_slot_mem (no_slot_mem)
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);
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